• KIISE Transactions on Computing Practices
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• v.23 no.2
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• pp.97-103
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• 2017

Many hardware-based regular expression matching architectures have been proposed for high-performance matching. In particular, regular expression processors, which perform pattern matching by treating the regular expressions as the instruction sequence like general purpose processors, have been proposed. After instruction sequence and data are provided in the instruction memory and data memory, respectively, a regular expression processor can perform pattern matching. To use a regular expression processor as a coprocessor, we need the host interface to transfer the instruction and data into the memory of a regular expression processor. In this paper, we design and implement the host interface between a host and a regular expression processor in the DE1-SoC board and the application program interface. We verify the operations of the host interface and a regular expression processor by executing the application programs which perform pattern matching using the application program interface.

• Journal of KIISE:Computing Practices and Letters
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• v.16 no.12
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• pp.1194-1198
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• 2010

Recent mobile devices have multiple wireless network interfaces. Therefore, we can use a more 'energy efficient network interface for reducing energy consumption' according to the network environment without depending on a specific network interface. In this paper, we propose an energy efficient wireless network interface selection scheme for mobile devices with multiple wireless network interfaces. The proposed scheme selects a more energy efficient network interface for data communication by using polling. Also, we show that our scheme is more efficient in terms of energy consumption.

• Journal of KIISE:Software and Applications
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• v.31 no.1
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• pp.29-42
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• 2004

According to rapid growth of a web environment, usage-centered design is being highlighted. This paper suggests the development step and algorithm to generate a user interface prototype automatically on the basis of usage-centered design. For this purpose, The transition object of the user interface is modeled from requirement analysis, and an modeling rule as well as algorithms of business events are made for the creation of the user interface. Through these processes, visual cohesions of business events become strong and unskilled designers can develop the qualified user interface prototypes. A user's understanding of business tasks can also be improved and prototype iterations reduced.

• Journal of IKEEE
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• v.10 no.2 s.19
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• pp.128-133
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• 2006

This paper describes a high speed interface circuit using redundant multi-valued logic for high speed communication ICs. This circuit is composed of encoding circuit that serial binary data are received and converted into parallel redundant multi-valued data, and decoding circuit that converts redundant multi-valued data to parallel binary data. Because of the multi-valued data conversion, this circuit makes it possible to achieve higher operating speeds than that of a conventional binary logic. Using this logic, the proposed 1:4 DEMUX (demultiplexer, serial-parallel converter), was designed using a 0.35um standard CMOS technology. Proposed DEMUX is achieved an operating speed of 4.5Gb/s with a supply voltage of 3.3V and with power consumption of 53mW. The operating speed of this circuit is limited by the maximum frequency which the 0.35um process has. Therefore, this circuit is to achieve CMOS communication ICs with an operating speed greater than 10Gb/s in submicron process of high operating frequency.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.245-252
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• 2003

We designed a silicon pressure sensor interface circuit with digital calibration capability. The interface circuit is composed of an analog section and a digital section. The analog section amplifies the weak signal from the sensor and the digital section handles the calibration function and communication function between the chip and outside microcontroller that controls the calibration. The digital section is composed of I2C serial interface, memory, trimming register and controller. The I2C serial interface is optimized to suit the need of on-chip silicon microsensor in terms of number of IO pins and silicon area. The major part of the design is to build a controller circuit that implements the optimized I2C protocol. The designed chip was fabricated through IDEC's MPW. We also made a test board and the test result showed that the chip performs the digital calibration function very well as expected.

• Journal of KIISE:Computing Practices and Letters
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• v.9 no.3
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• pp.227-240
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• 2003

When we develop and use the java-based distributed object system, the system developer must deploy distributed object, which is implemented to predefined interface, to network and the system user acquires reference about distributed object and changes reference to interface type. Sharing of interface is essential for these works In this paper, we propose the IRSJ(interface repository service based on jim) to improve efficiency of interface sharing at the JINI system development. the IRSJ is consisted of the java classes for JINI system and interface sharing service. If development teams perform collaborative work in short distance, the IRSJ can search interface file without information of lookup server or interface writer If development teams perform collaborative work in long distance, the IRJS can search interface with only an address of server that executes lookup service. Although the interface object not requires additional search, the interface object that failed search interface can download interface and use interface using remote event model. When the message service fails in interface search, the message service sends interface request message to a development team member who use the IRSJ automatically, so that interface sharing may be possible in short time.

• Journal of Sensor Science and Technology
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• v.3 no.1
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• pp.54-60
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• 1994

In this paper, the multi-sensor signal processing IC is designed. It consists of an analog multiplexer for selection of multi-sensor signals, active filters for noise rejection and signal amplification, and a sample and hold circuit for interface with digital signal processing. By implementing these circuits with CMOS transistors, integration, low power dissipation and miniaturization of the total signal processing system have been made possible.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1868-1869
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• 2007

항공기의 임무컴퓨터는 외부영상과 비행관련 정보들을 시현하기 위한 그래픽 처리를 담당한다. VIOM은 외부영상신호를 임무컴퓨터의 각 모듈에 전달하고, 내부모듈에서 생성한 비행관련정보들을 원하는 시현장치로 전송하는 역할을 한다. 현재 개발하고자 하는 KHP용 임무컴퓨터의 VIOM은 영상수신처리회로, 영상분배 및 선택회로, 모듈영상수신 및 분배회로, 모듈영상선택회로, 그리고 영상선택 정보를 획득하기 위한 데이터 인터페이스 등으로 구성된다. 본 논문은 KHP 임무컴퓨터 VIOM 의 전체 인터페이스 구성과 이를 위한 각 회로 설계에 대한 정보를 제시함을 목적으로 한다.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 1992.06a
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• pp.297-300
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• 1992

• The Magazine of the IEIE
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• v.40 no.6
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• pp.46-52
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• 2013