• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.14 no.6
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• pp.60-68
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• 2015

Recent proliferation of advanced technologies such as wireless communication, mobile, sensor technology and so on has caused significant changes in a traffic environment. Human beings, in particular drivers, as well as roads and vehicles were advanced on information, intelligence and automation thanks to those advanced technologies; Intelligent Transport Systems (ITS) and autonomous vehicles are the results of changes in a traffic environment. This study proposed considerations when designing a simulation model for future transportation environments, which are difficult to predict the change by means of advanced technologies. First of all, approximability, flexibility and scalability were defined as a macroscopic concept for a simulation model design. For actual similarity, calibration is one of the most important steps in simulation, and Physical layer and MAC layer should be considered for the implementation of the communication characteristics. Interface, such as API, for inserting the additional models of future traffic environments should be considered. A flexible design based on compatibility is more important rather than a massive structure with inherent many functions. Distributed computing with optimized H/W and S/W together is required for experimental scale. The results of this study are expected to be used to the design of future traffic simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.69-76
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• 2008

This work proposes a 12b 1kS/s 65uA 0.35um CMOS algorithmic ADC for sensor interface applications such as accelerometers and gyro sensors requiring high resolution, ultra-low power, and small size simultaneously. The proposed ADC is based on an algorithmic architecture with recycling techniques to optimize sampling rate, resolution, chip area, and power consumption. Two versions of ADCs are fabricated with a conventional open-loop sampling scheme and a closed-loop sampling scheme to investigate the effects of offset and 1/f noise during dynamic operation. Switched bias power-reduction techniques and bias circuit sharing reduce the power consumption of amplifiers in the SHA and MDAC. The current and voltage references are implemented on chip with optional of-chip voltage references for low-power SoC applications. The prototype ADC in a 0.35um 2P4M CMOS technology demonstrates a measured DNL and INL within 0.78LSB and 2.24LSB, and shows a maximum SNDR and SFDR of 60dB and 70dB in versionl, and 63dB and 75dB in version2 at 1kS/s. The versionl and version2 ADCs with an active die area of $0.78mm^2$ and $0.81mm^2$ consume 0.163mW and 0.176mW at 1kS/s and 2.5V, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.5
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• pp.949-956
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• 2016

By recent development of wired and wireless communication technology, any service can be delivered through broadcasting networks or communication networks. So contents consumers want to receive broadcasting program via any accessible network. Network independent broadcasting system can receive optimized multimedia contents by combining the high-quality multimedia contents transmitted through broadcasting network and the additional contents delivered through communication network. Additional contents can be other multimedia contents, URL of contents, some texts for indicating information of received multimedia, etc. Network independent broadcasting system is in early stage of development, and receivers and the monitoring system for hybrid broadcast are under development. Thus the multiplexing method and demultiplexing method to perform hybrid broadcasting is on study. In this paper, we designed the demultiplexing algorithm to perform hybrid broadcasting system and implemented demultiplexer system based on modulator interface system standard T2-MI of DVB-T2.

• Journal of KIISE:Software and Applications
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• v.29 no.11
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• pp.851-859
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• 2002

This paper discusses the design of a working system that visually recognizes hand gestures for the control of a window based user interface. We present a method for tracking the fingertip of the index finger using a single camera. Our method is based on CAMSHIFT algorithm and performs better than the CAMSHIFT algorithm in that it tracks well particular hand poses used in the system in complex backgrounds. We describe how the location of the fingertip is mapped to a location on the monitor, and how it Is both necessary and possible to smooth the path of the fingertip location using a physical model of a mouse pointer. Our method is able to track in real time, yet not absorb a major share of computational resources. The performance of our system shows a great promise that we will be able to use this methodology to control computers in near future.

• Journal of Welding and Joining
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• v.12 no.2
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• pp.11-19
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• 1994

레이저 가공기술은 재료가공 분야에서 넓은 응용분야를 가지고 있으며, 특히 절단, 용접, 열처리 등의 가공분야에서 고정밀도와 자동화의 용이성으로 인해 생산성이 높은, 고부가가치의 첨단응용 기술로 부각되고 있다. 특히 레이저절단은 타 절단법에 비교되는 절단정도, 열영향, 생산성, 작업 환경등의 각종 우위성으로 박판 및 후판절단분야에서 급속한 보급을 보이기 시작하였다. 현재 대 부분의 레이저 가공기는 CNC화 되어가고 있는 추세이며, 레이저 절단의 경우 생산성증대 및 고 정밀화를 위하여 CAD/CAM인터페이스에 의한 자동화가 필연적인 상황이다. 뿐만아니라 고출력 레이저 발전기를 가공 기본체에 탑재한 탑재형 레이저가공기의 출현으로 대형부재의 절단이 가능 하게 되었으며, 더불어 절단공정의 무인화를 지향하는 각종 시스템이 개발되고 있다. 이와 같은 무인화, 생산성증대, 작업시간단축과 러닝 코스트 및 재료의 절감을 위한 노력의 일환으로 컴 퓨터에 의한 자동 및 반자동 네스팅 시스템의 개발을 들 수 있다. 레이저에 의한 2차원 절단응 용분야에서의 네스팅작업은 설계가 끝난 각 부품의 절단작업의 전단계로서 수행되며, 일반적으로 네스팅공정이 완료되면 절단경로를 결정하고 가공조건과 함께 수치제어공작기계의 제어에 필요한 NC코드를 생성하게 된다. 최근에는 이와 같은 네스팅 시스템이 일부 생산현장에 적용되고 있 으나 이러한 시스템들의 대부분이 외국에서 개발된 것을 수입하여 사용하는 실정이다. 2차원 패턴의 최적자동배치문제는 비단 레이저 절단과 같은 열가공 분야에서 뿐만 아니라 블랭킹 금형, 의류, 유리, 목재등 여러분야에서 응용이 가능하며 패키지의 국산화가 시급한 실정이다. 네스 팅작업은 적용되는 분야에 따라 요구사항과 구속조건이 달라지며 이로 인해 알고리즘과 자료구 조도 달라지게 되나 공통적인 목표는 주어진 영역안에서 겹침없이 배치하면서 버림율을 최소화 하는 것이다. 지난 10여년간 여러 산업의 응용분야에서는 네스팅시스템의 도입이 활발하게 이 루어지고 있는데 수동에 반자동 및 자동에 이르기까지 다양하나 자동네스팅시스템의 경우 배치 효율의 신뢰성이 비교적 부족하기 때문에 아직까지는 생산현장에서 기피하는 실정이다. 배치알 고리즘의 관점에서 볼 때 이러한 문제들은 NP-complete문제로 분류하며 제한된 시간안에 최적의 해를 구하기가 가능한 조합 최적화 문제로 알려져 있다. 따라서 이 글에서는 레이저 절단분야 에서의 네스팅시스템에 관한 개요와 최근의 연구동향 그리고 몇 가지 전형적인 네스팅 알고리 즘들을 소개하고 비교분석을 통해 개선점을 간략하게 논의하고자 한다.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.10 no.9
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• pp.2535-2544
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• 2009

The brain-wave research provides relatively various information for brain condition in safety. The counselor or measuree will must easily reduce user TCO about the series of process for the measurement, analysis, and management of brain-wave, and can access to the desired information in real time. While the traditional method for brain-wave process was processed manually by the judgment of a specialist. In this paper the developed system is smart brain-wave care system based on optimizing and combining the 3-Tier client/server by IT with brain-wave technology including BQT. This system was developed in the real-time service with a completely automated process by the conveniently web interface. Our system currently gave a service at the field, and the collected data on DB were provided to researchers for the use of clinical research.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.4
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• pp.15-25
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• 2012

The research on the FPGA CAD tools in academia has been lacking practicality due to the underlying FPGA fabric architecture which is too simple and inefficient to be applied for commercial FPGAs. Recently, the database of placement positions and routing graphs on commercial FPGA architectures has been built, and provided for enabling the academic development of placement and routing tools. To extend the limit of academic CAD tools even further, we have developed the evaluation toolkit for the K-FPGA architecture which is under development. By providing interface for exchanging data with a commercial FPGA toolkit at every step of mapping, packing, placement and routing in the tool chain, the toolkit enables individual tools to be developed without waiting for the results of the preceding step, and with no dependency on the quality of the results, and compared in detail with commercial tools at any step. Also, the fabric primitive library is developed by extracting the prototype from a reporting file of a commercial FPGA, restructuring it, and modeling the behavior of basic gates. This library can be used as the benchmarking target, and a reference design for new FPGA architectures. Since the architecture is described in a standard HDL which is familiar with hardware designers, and read in the tools rather than hard coded, the tools are "data-driven", and tolerable with the architectural changes due to the design space exploration. The experiments confirm that the developed library is correct, and the functional correctness of applications implemented on the FPGA fabric can be validated by simulation. The placement and routing tools are under development. The completion of the toolkit will enable the development of practical FPGA architectures which, in return, will synergically animate the research on optimization CAD tools.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.18 no.3
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• pp.437-446
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• 2017

70 percent of Korea's territory is covered with mountains, whose difficult conditions can cause damage to facilities. Recently, the demand for facilities related to outdoor activities including monorails has been on the rise, and such facilities are much more likely to become damaged. For this reason, a monitoring system applying IoT to mountainous areas was developed and its applicability is evaluated in this study. The current status of the existing mountainous facilities and monitoring systems were reviewed, and the current wired monitoring technology was analyzed. A scenario for IoT-based monitoring was developed, and then sensor nodes were developed, which include an RF-communication module and interface, power-supply and solar-cell. A testbed was set up at K University. The same data was collected by the wireless system as had been collected by the wired one. The study findings are as follows. Firstly, by using the wireless system, it is estimated that the construction duration can be reduced by about 25 percent, while the construction costs can be reduced by about 3~52 percent. Secondly, the safety of the construction workers can be improved by making the working conditions less dangerous, such as by eliminating the need to transport cables.

• Spatial Information Research
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• v.20 no.1
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• pp.91-103
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• 2012

Recently, there has been much interest in the middleware that can smoothly acquire and analyze Geosensor information which includes sensor readings, location, and its surrounding spatial information. In relation to development of the middleware, researchers have proposed various algorithms for energy-efficient information filtering in Geosensor networks and have proposed Geosensor web technologies which can efficiently mash up sensor readings with spatial information on the web, also. The filtering algorithms and Geosensor Web technologies have contributions on energy-efficiency and OpenAPI, however the algorithms and technologies could not support easy and rapid development of u-GIS applications that need various Geosensor networks. Therefore, we propose a new Geosensor network middleware that can dramatically reduce the time and cost required for development of u-GIS applications that integrate heterogeneous Geosensor networks. The proposed middleware has several merits of being capable of acquiring heterogeneous Geosensor information using the standard SWE and an extended SQL, optimally performing various attribute and spatial operators, and easily integrating various Geosensor networks. Finally, we clarify our middleware's distinguished features by developing a prototype that can monitor environmental information in realtime using spatial information and various sensor readings of temperature, humidity, illumination, imagery, and location.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.48 no.4
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• pp.116-128
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• 2011

In this paper, we propose the structure of a high-performance face-detection engine that responds well to facial rotating changes using rotation transformation which minimize the required memory usage compared to the previous face-detection engine. The validity of the proposed structure has been verified through the implementation of FPGA. For high performance face detection, the MCT (Modified Census Transform) method, which is robust against lighting change, was used. The Adaboost learning algorithm was used for creating optimized learning data. And the rotation transformation method was added to maintain effectiveness against face rotating changes. The proposed hardware structure was composed of Color Space Converter, Noise Filter, Memory Controller Interface, Image Rotator, Image Scaler, MCT(Modified Census Transform), Candidate Detector / Confidence Mapper, Position Resizer, Data Grouper, Overlay Processor / Color Overlay Processor. The face detection engine was tested using a Virtex5 LX330 FPGA board, a QVGA grade CMOS camera, and an LCD Display. It was verified that the engine demonstrated excellent performance in diverse real life environments and in a face detection standard database. As a result, a high performance real time face detection engine that can conduct real time processing at speeds of at least 60 frames per second, which is effective against lighting changes and face rotating changes and can detect 32 faces in diverse sizes simultaneously, was developed.