• Journal of KIISE:Computer Systems and Theory
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• v.31 no.1_2
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• pp.19-26
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• 2004

In this paper, we investigate the longest fault-free paths joining every pair of vertices in a double loop network with faulty vertices and/or edges, and show that a bipartite double loop network G(mn；1, m) is strongly hamiltonian-laceable when the number of faulty elements is two or less. G(mn；1, m) is bipartite if and only if m is odd and n is even.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.10
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• pp.934-940
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• 2011

A novel reconfigurable beam steering antenna using double loops is proposed. The double loop antenna has a superposed beam which is produced by combining the in-phase beam in the inner loop with the out-of-phase beam in the outer loop. Also, the doble loop antenna uses two artificial switches to connect between inner loop and outer loop, and has the beam directions of three separate cases(Case 1, Case 2, Case 3) by changing ON/OFF states of switches. The operation frequency of the antenna is 14.5 GHz, and three maximum beam directions of the antenna are ${\phi}_{max}=0^{\circ}$, ${\theta}_{max}=0^{\circ}$(Case 1), ${\phi}_{max}=230^{\circ}$, ${\theta}_{max}=40^{\circ}$(Case 2) and ${\phi}_{max}=130^{\circ}$, ${\theta}_{max}=40^{\circ}$ (Case 3). The peak gains of each case are 6.5 dBi(Case 1), 7.6 dBi(Case 2) and 7.8 dBi(Case 3). The half power beam width(HPBW) of each case is $86{\sim}104^{\circ}$, and the overall HPBW is $160^{\circ}$.

• Proceedings of the Korea Information Processing Society Conference
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• 2000.04a
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• pp.557-561
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• 2000

본 논문에서는 외부 루프를 펼침으로서 불변 종속거리를 가지는 다중 첨자 루프에서의 병렬화를 이룰 수 있는 새로운 알고리즘을 제시한다. 루프는 프로그램의 수행 시간중 많은 부분을 차지하고, 병렬성 추출의 기본이 되는 구조이다. 루프에서 병렬성을 추출하는 기존의 연구는 종속성이 단일 첨자 또는 복수 첨자에 영향을 받는 경우에만 한정되었다. 다중 첨자를 가지는 루프는 이중 또는 그 이상의 첨자 때문에 기존의 방법을 이용해서 루프의 종속성을 제거하는데 필요한 종속거리를 결정할 수 없다. 그러므로 본 논문에서는 종속거리를 측정하기 위한 새로운 기법을 제안하고, 제안된 알고리즘을 모의 실험에 의해 타당성을 확인한다.

• The Transactions of the Korean Institute of Power Electronics
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• v.8 no.6
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• pp.561-568
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• 2003

There arc two ways in the output voltage control method in PWM inverters. One Is double loop voltage control composed of inner current control loop and outer voltage control loop.'rho other is single loop voltage control method composed of voltage control loop only. It's characteristics shows lower performance in case of high output impedance than double loop voltage control. However, in case of low output impedance, it shows good control performance in all load ranges than double loop voltage control. In this paper, the rule and the gain of single loop voltage control have been developed analytically and these were verified through computer simulation and experiment.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.12
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• pp.84-89
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• 2010

In this paper, a novel voltage-controlled oscillator (VCO) using the microstrip square open loop dual split ring resonator is presented for reducing the phase noise. The square-shaped dual split ring resonator having the form of the microstrip square open loop is investigated to reduce the phase noise. Compared with the microstrip square open loop resonator and the microstrip square open loop split ring resonator as well as the conventional microstrip line resonator, the microstrip square dual split ring resonator has the larger coupling coefficient value, which makes a higher Q value, and has reduced the phase noise of VCO. The VCO with 1.7V power supply has the phase noise of -123.2~-122.0 dBc/Hz @ 100 kHz in the tuning range, 11.74~11.75 GHz. The figure of merit (FOM) of this VCO is-214.8~-221.7 dBc/Hz dBc/Hz @ 100 kHz in the same tuning range. Compared with VCO using the conventional microstrip line resonator, VCO using microstrip square open loop resonator, the phase noise of VCO using the proposed resonator has been improved in 26 dB, 10 dB, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.5
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• pp.551-558
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• 2012

This paper presents a dual band loop-type ground antenna using lumped-elements that control the impedance bandwidth and resonant frequency. The dual-band operation of the proposed antenna is realized by inserting an additional resonated loop feed structure into the reference ground antenna. As the proper value of the capacitor and the inductor are chosen, the impedance bandwidth of our antenna with voltage standing wave ratio(VSWR) equal to 3 is 85 MHz and 725 MHz at the 2.45 and 5.5 GHz frequency band, respectively. Its validity is demonstrated via both the computed and measured results. Good antenna patterns and efficiencies are achieved at the dual frequency bands, as well as the physically small antenna element size($10{\times}5mm^2$).

• Proceedings of the KIPE Conference
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• 2011.07a
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• pp.194-195
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• 2011

본 논문은 Bi-directional Inverter(BDI)에 DQ 변환을 적용한 소신호 등가 모델과 이중 루프 제어기 설계에 대해 제안한다. 일반적으로 외부루프의 경우 동적 특성이 매우 느리기 때문에 외부루프 전달함수를 고려하지 않고 설계하는 경우가 많다. 결과적으로 시스템의 안정성이나 동적 특성이 설계한 것과 다르게 나타날 수 있다. 따라서 원하는 특성을 만족하기 위해 실험적 시행착오를 거쳐 설계를 하게 된다. 본 논문에서는 정확한 소신호 등가 모델을 제시하고 제어기를 설계한다. 제안된 방식은 PSIM 시뮬레이션 및 실험을 통해 회로해석과 소신호 등가모델의 타당성 및 제어기 설계의 타당성을 증명하였다.

• Journal of Korea Society of Industrial Information Systems
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• v.20 no.6
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• pp.29-36
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• 2015

This paper presents an LED backlight driver IC consisting of three linear current regulators and an output-voltage regulation loop with a self-adjustable reference voltage. In the proposed LED driver, the output voltage is controlled by dual feedback loops. The first loop senses and controls the output voltage, and the second loop senses the voltage drop of the linear current regulator and adjusts the reference voltage. With these feedback loops, the voltage drop of the linear current regulator is maintained at a minimum value, at which the driver efficiency is maximized. The output of the driver is a three-channel LED setup with four LEDs in each channel. The luminance is adjusted by the PWM dimming signal. The proposed driver is designed by a $0.35-{\mu}m$ 60-V high-voltage process, resulting in an experimental maximum efficiency of approximately 85%.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.15 no.7
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• pp.1552-1558
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• 2011

In this paper, a dual-loop Integer-N phase-delay locked loop(P DLL) architecture has been proposed using a low power consuming voltage controlled delay line(VCDL). The P DLL can have the LF of one small capacitance instead of the conventional second or third-order LF which occupies a large area. The proposed dual-loop P DLL can have a small gain VCDL by controlling the magnitude of capacitor and charge pump current on the loop of VCDL. The proposed dual-loop P DLL has been designed based on a 1.8V $0.18{\mu}m$ CMOS process and proved by Hspice simulation.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.3 no.2 s.5
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• pp.69-74
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• 2004

In this work, A PLDRO (Phase Locked Dielectric Resonator Oscillator) which can be used for the wireless communication systems fur MMC(Microwave Micro Cell) and ITS wireless communication system is designed. A different approach to the PLDRO structure is applied for phase locking by dual phase lock loop structure. The proposed dual loop PLDRO generates the output power of 0 dBm at 18.7 GHz and has the characteristics of a phase noise of -80 dBc/Hz at 1kHz, -83 dBc/Hz at 10 kHz offset frequency from carrier frequency