• Journal of KIISE:Computing Practices and Letters
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• v.16 no.4
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• pp.452-456
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• 2010

In wireless sensor networks, due to the many-to-one convergence of upstream traffic, congestion more probably appears. Network congestion can be alleviated by controlling incoming traffic, but using traffic control can violate fidelity level required by applications. In this paper, we propose multipath-based congestion control scheme alleviating congestion by resource control for wireless sensor networks. When congestion occurs, the multipath-based congestion control scheme distributes network traffic through multiple alternate paths, and consequently, the scheme enables to detour in the congested spot and increase resource utilization. Our results show that our multipath-based congestion control scheme can satisfy fidelity level required by applications and alleviate congestion effectively.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2009.10a
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• pp.1026-1029
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• 2009

Efficient Power consumption is important in sensor networks because charging of deployed sensor nodes is too difficult. So this paper focused on Modified-CBPER reduces energy consumption by reducing CBPER's data announcement ragne, and propose an algorithm to reduce power consumption by additional reduction of data announcement range. Proposed EM-CBPER(Enhanced Modified CBPER) somewhat increases power consumption of data request and data forwarding but it reduces total power consumption by reducing data announcement transmission of account for large quantity on total packet transmission.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.11
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• pp.64-74
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• 1999

A new clock skew optimization for clock routing using link-edge insertion is proposed in this paper. It satisfies the given skew bound and prevent the total wire length from increasing. As the clock skew is the major constraint for high speed synchronous ICs, it must be minimized in order to obtain high performance. But clock skew minimization can increase total wire length, therefore clock routing is performed within the given skew bound which can not induce the malfunction. Clock routing under the specified skew bound can decrease total wire length Not only total wire length and delay time minimization algorithm using merging point relocation method but also clock skew reduction algorithm using link-edge insertion technique between two nodes whose delay difference is large is proposed. The proposed algorithm construct a new clock routing topology which is generalized graph model while previous methods uses only tree-structured routing topology. A new cost function is designed in order to select two nodes which constitute link-edge. Using this cost function, delay difference or clock skew is reduced by connecting two nodes whose delay difference is large and distance difference is short. Furthermore, routing topology construction and wire sizing algorithm is developed to reduce clock delay. The proposed algorithm is implemented in C programming language. From the experimental results, we can get the delay reduction under the given skew bound.

• Journal of Internet of Things and Convergence
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• v.8 no.4
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• pp.1-7
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• 2022

As the number of IoT devices increases, power management of the cluster head, which acts as a gateway between the cluster and sink nodes in the IoT network, becomes crucial. Particularly when the cluster head is a mobile wireless terminal, the power consumption of the IoT network must be minimized over its lifetime. In addition, the delay of information transmission in the IoT network is one of the primary metrics for rapid information collecting in the IoT network. In this paper, we propose a low-power buffer management algorithm that takes into account the information transmission delay in an IoT network. By forwarding or skipping received packets utilizing deep Q learning employed in deep reinforcement learning methods, the suggested method is able to reduce power consumption while decreasing transmission delay level. The proposed approach is demonstrated to reduce power consumption and to improve delay relative to the existing buffer management technique used as a comparison in slotted ALOHA protocol.