• Transactions of the Korean Society of Mechanical Engineers A
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• v.37 no.9
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• pp.1151-1158
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• 2013

Knowledge of the moisture sorption properties of a material is essential for optimal material development and analysis of the delamination failure caused by vapor pressure at the interlayer during the manufacturing process of integrated packaging devices. In this paper, both temperature dependent absorption and desorption properties according to temperature and humidity model are parameterized and the effects of water activities and temperature are discussed. The activation energy obtained from the parameterized diffusivity determines the acceleration factor for the equivalency of moisture sorption levels, which enables the effect of moisture diffusivity on the equivalent elapsed testing time required for evaluating the reliable life time to be estimated. The acceleration factor evaluated at the reliability testing standard of the flexible packaging module is exampled.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.4
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• pp.97-102
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• 2007

This paper presents our implemented, synthesized and tested on demand and partial reconfiguration approaches for FIR filters using Xilinx Virtex FPGAs. Our scope is implementation of a low-power, area-efficient autonomously reconfigurable digital signal processing architecture that is tailored for the realization of arbitrary response FIR filters on Xilinx Virtex4 FPGAs. The implementation of design addresses area efficiency and flexibility allowing dynamically inserting and/or removing the partial modules to implement the partial reconfigurable FIR filters with various taps. This partial reconfigurable FIR filter design shows the configuration time improvement, good area efficiency and flexibility by using the dynamic partial reconfiguration method.

• Journal of the Institute of Electronics Engineers of Korea CI
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• v.43 no.2 s.308
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• pp.40-51
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• 2006

As computer games become more complex and consumers demand more sophisticated computer controlled NPCs, developers are required to place a greater emphasis on the artificial intelligence aspects for their games. The platform for game NPC Intelligence Development should support real-time, independence, flexibility, group behavior, and various A.I to NPC that are reactive, realistic and easy to develop. This paper presents an architecture to satisfy these criteria for the platform of game NPC intelligence development. The proposed platform shows the higher performance than existing platform through the load sharing, and it also has some advantages which are supporting the various AI techniques, efficient group behavior, and independence to develop NPC intelligence.

• Proceedings of the Korea Information Processing Society Conference
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• 2004.11a
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• pp.117-120
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• 2004

인터넷의 사용 증가로 정보의 양은 기하급수적으로 증가하고 있으며 웹 데이터의 표준인 XML의 데이터 표현의 유연성으로 인해 EDMS(Electronic Document Management Syste), ebXML(e-business extensible Markup Language)등 웹 기반의 전자문서를 이용하는 XML를 문서 교환 및 표준 문서 형식으로 도입하고 있는 실정이다. 이런 XML문서들을 저장관리 하기 위해 XML전용 Database도 현재 많이 연구되고 있다. 하지만 이런 XML전용 Database들은 관계형 데이터베이스보다 실용성이 떨어지는 점들이 많아 XML과 관계형 데이터베이스 매핑에 대한 연구도 활발히 진행중이다. 본 논문에서는 $C{\sharp}$을 이용하여 XML과 관계형 데이터베이스 간의 매핑을 위한 모듈을 개발하였으며, XML의 element와 관계형 데이터베이스의 필드를 상호 매핑시켜 줌으로 인해 XML문서의 element를 정확하게 저장, 관리 할 수 있다.

• Proceedings of the Korea Information Processing Society Conference
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• 2000.04a
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• pp.523-527
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• 2000

최근 기업에서의 인터넷 응용이 보편화되고 있으며, 인터넷 기반의 전자상거래(CALS/EC)는 선택의 문제가 아니라 생존의 수단으로 받아 들여 지고 있다. CALS/EC는 비즈니스 관련 정보를 전자적으로 교환함으로써 기존의 비즈니스 방식을 개선, 전환, 재정의하고, 비용절감, 품질향상, 서비스의 품질과 속도개선을 통해 고객만족과 기업이윤을 증대시키는 새로운 기업의 전술로 정의되고 있다. 이러한 인터넷 기반 CALS/EC의 활성화로 인해 여러 분야에서의 기업 상품에 대한 마케팅 전략 등이 최우선적으로 고려되고 있다. 본 논문에서는 이러한 전자상거래를 포함, 인터넷 이용자의 특성.취향을 분석하기 위한 이용자 특성.취향 분석 시스템의 구성원리와 그 구성요소 중 하나의 모듈인 특성화된 이용자 로그정보로부터 추적 알고리즘을 이용한 시뮬레이션을 수행함으로써, 보다 정확한 이용자 정보를 수집하여 유연성있는 정보를 제공할 수 있는 시스템을 구축하고 구현하였다.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.5 s.335
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• pp.23-28
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• 2005

Recently, new concept, NP(Network Processor) was emerged into communication systems to cope with the various service requirements from Internet users. NP is an unique promising technique to capable of implementing of the packet processing in wire-speed and providing the flexibility for supporting the newly network services, having satisfied with implementation using hardware and software respectively in past, This paper deals with the implementation techniques and evaluation results of the line card capable to do packet forwarding function with packet processing power of wire-speed and applicable to various physical interfaces. There are several interfaces of POS, Gigabit ethernet and EPON in E-OLT(EPON Optical Line Terminal) system of PATH(Photonic Access To Home) network. Therefore, the E-OLT's packet forwarding engine have to support various subscriber's interface in wire speed. Our system is implemented the subscriber's card in daughter board and the setup procedure is done by system firmware based on the module's identifier acquired from installed physical board.

• 전자공학회논문지 IE
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• v.46 no.4
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• pp.66-72
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• 2009

In field of environments, the control and monitoring devices for sewage disposal facilities have been developed to overcome a problem of the water contamination according to industrialization and urbanization. In order to control and monitor the driving motor and the surroundings states of the sewage disposal facilities installed in local stations, this paper presents the design method of efficient module system interconnected by internal network with serial interface. It is expected that the proposed method in this paper is able to provide the more adaptive and flexible design technique for the specification of condition and factors needed in the fast-changed environment market.

• Electronics and Telecommunications Trends
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• v.31 no.3
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• pp.101-111
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• 2016

최근 위성통신방송 시장의 요구에 따라 위성 시스템 비용 절감에 적합한 비용 대비 효율성이 매우 높은 flexibile 위성 탑재체에 대한 연구가 이루어지고 있다. 이에 본고에서는 차기 flexible 위성통신 방송 탑재체의 주요 핵심 기술인 재구성 빔 안테나용 flexible 안테나 및 빔 형성 모듈 기술, 유연한 주파수 스펙트럼 제공용 가변 국부 발진기 및 가변 필터 기술에 대해 살펴보기로 한다.

• Journal of the Microelectronics and Packaging Society
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• v.25 no.3
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• pp.13-19
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• 2018

The soldering property of Pb-containing solder(Sn-Pb) and Pb-free solders(Sn-3.0Ag-0.5Cu and Sn-1.0Ag-0.7Cu-1.6Bi-0.2In) for solar combiner box module was compared. The solar combiner box module was composed of voltage and current detecting modules, diode modules, and other modules. In this study, solder paste printability, printing shape inspection, solder joint property, X-ray inspection, and shear force measurements were conducted. For optimization of Pb-free soldering process, step 1 and 2 were divided. In the step 1 process, the printability of Pb-containing and Pb-free solder alloys were estimated by using printing inspector. Then, the relationship between void percentages and shear force has been estimated. Overall, the property of Pb-containing solder was better than two Pb-free solders. In the step 2 process, the property of reflow soldering for the Pb-free solders was evaluated with different reflow peak temperatures. As the peak temperature of the reflow process gradually increased, the void percentage decreased by 2 to 4%, but the shear force did not significantly depend on the reflow peak temperature by a deviation of about 0.5 kgf. Among different surface finishes on PCB, ENIG surface finish was better than OSP and Pb-free solder surface finishes in terms of shear force. In the thermal shock reliability test of the solar combiner box module with a Pb-free solder and OSP surface finish, the change rate of electrical property of the module was almost unchanged within a 0.3% range and the module had a relatively good electrical property after 500 thermal shock cycles.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.9 s.351
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• pp.53-58
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• 2006

A Vertex Shader is designed to show more 3D graphics expressions, and to increase flexibility of the fixed function T&L (Transform and Lighting) engine. Design of this Shader is based on Vertex Shader 1.1 of DirectX 8.1 and OpenGL ARB. The Vertex Shader consists of four floating point ALUs for vectors operation. The previous 32bits floating point data type is replaced to 24bits floating point data type in order to design the Vertex Shader that consume low-power and occupy small area. A Xilinx Virtex2 300M gate module is used to verify behaviour of the core. The result of Synopsys synthesis shows that the proposed Vertex Shader performs 115MHz speed at the TSMC 0.13um process and it can operate as the rate of 12.5M Polygons/sec. It shows the complexity of 110,000 gates in the same process.