• The Journal of Korean Institute of Communications and Information Sciences
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• v.42 no.5
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• pp.1093-1101
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• 2017

Microgrid as a unit component consisting a smart grid is an isolated system, which has a decentralized power supply system. This paper proposes an electrical isolation of the microgrid from the utiliy grid based on a power conditioning system, and also proposes an operation method maintaining the isolated state efficiently using diverse distributed energy resources such as renewable energy sources and energy storage system. The proposed system minimizes the influence of the grid connection on the internal load though a phase detection and synchrnoization to the utiligy grid and the microgrid can be stable even if the grid is failed.

• Journal of Convergence for Information Technology
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• v.9 no.5
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• pp.125-129
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• 2019

This paper describes the jamming effect of phase-coded pulse compression(PCPC) radar. Barker code radar, a typical PCPC radar, separates transmission pulses into 13 or 31 small pulses and phase modulates and transmits each pulse signal to increase radar detection efficiency and reduce the influence of jamming. Generally, when the radar is subjected to jamming, the detection distance becomes shorter and the detection error rate becomes higher. In the case of noise jamming or carrier jamming on the PCPC radar, the jamming effect is very small for no phase-coded convergence. However, the jamming effect is large in the case of synchronous jamming using the pulse-coded signal as a jamming signal with DRFM. It can be seen that the jamming effect increases when the storage time of the pulse-coded signal is prolonged. This study is considered to be useful for PCPC radar and EW jamming system design.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.1759-1760
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• 2006

GPS 수신기에서 항법을 수행하기 위해서 신호탐색, 신호추적, 데이터 동기, 데이터 복조, 측정치 생성 및 위치 계산의 과정을 거쳐야 한다. TTFF(Time To First Fix)는 이러한 시간의 합으로 수신기의 성능을 나타내는 중요 평가지수 중의 하나이다. 일반적인 수신기의 TTFF는 80~90초인 것으로 알려져 있으며, 고속으로 운동하는 항체의 경우, 빠른 TTFF를 필요로 하므로 가장 긴 시간이 소비하는 신호탐색 과정의 시간을 줄여야 한다. 본 논문에서는 고속으로 운동하는 항체에서 GPS 신호의 코드 탐색 시간을 줄이기 위하여 다중 상관기 구조를 가지는 수신기를 설계 하고자한다. 설계한 수신기는 수신된 신호의 코드위상을 여러 개의 상관기에서 동시에 탐색하도록 다중 상관기를 구성하여 코드위상 검색에 소요되는 시간을 단축시킨다. 이를 검증하기 위하여 GPS 모의 신호 발생기를 이용하여 실험을 수행하였다. GPS 신호는 IF 데이터 수집 장치로부터 수집된 신호를 이용하며, 실험 수행 결과 다중 상관기를 이용하였을 때 TTFF가 단축되는 것을 확인하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.10 s.89
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• pp.952-960
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• 2004

PSK(Phase Shift Keying) is useful because of the power and spectral efficient modulation. In this paper, no additional hardware will be needed to support various transmit mode in the suggested DSP scheme. We design and implement the synchronization algorithm for M-ary PSK(M=2, 4) demodulator based on DSP scheme, instead of complex analog PSK demodulator. TMS320C6203 is used as DSP. We check the all kinds of waveforms via the graph view window after software programming the emulation on the DSP tool. The result of implementation proves that demodulator using the suggested algorithm has equal performance with demodulator using analog circuits.

• Journal of Yeungnam Medical Science
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• v.6 no.2
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• pp.63-70
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• 1989

This paper describes to design and to examine the mechanical characteristics of high frequency jet ventilator. The device consists of Phase lock loop(PLL) system, solenoid valve driving control part and Air regulating system. This study is carried out by changing several factors such as endotracheal tube(E.T. tube)diameter, injector cannula diameter, 1%, and frequency(breaths/mim.) having direct effects on the gas exchange as well as parameters of the entrained gas by venturi effects, so as to measure the tidal volume and minute volume. This system characteristics were as follows : 1) Frequency : 6-594bpm 2) Inspiration time : 1-99% 3) Variance of input air pressure : 1-30PSI.

• The Transactions of the Korean Institute of Electrical Engineers D
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• v.50 no.12
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• pp.584-589
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• 2001

This paper presents an implementation method of multi-channel synchronized phasor measurement device, which is based on the ASIC implementation of the sliding-DFT. A time-shared multiplier structure is proposed to minimize the number of gates required for the implementation. The design is verified by the timing simulation of its operation. The effect of coefficient approximation in the recursive implementation of the sliding-DFT is analytically derived and verified with the computer simulations.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.8
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• pp.26-33
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• 1992

This paper describes a new phase-difference detection method and the associate process algorithm for calculating the mean value of phase difference detected and OVCXO control value and for monitoring and controlling the DP-PLL operation status to be used in the design of a high-frequency DP-PLL. Through the experiments of DP-PLL implemented with 16-bit processor, memories, pheriperals and OVCXO to eraluate the suggested method and algorithm, it is shown that a remarkable improvement in PLL function such as phase detection, and reference clock tracing capability, jitter absorbability and frequency stability compared with other existing DP-PLL synchronization device is achieved.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.7 no.3
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• pp.112-119
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• 1982

An experimental 2400bps modem emlpoying 4-phase DPSK in compliance with the CCITT recommendation V.26 is developed. Integrated circuits are used throughtout the circuit implementation, including active filters and a semiconductor delay line. A new timing recovery scheme is proposed and adopted successfully. The error rate perfromance is found to be in fair agreement with the theoretical prediction.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.3
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• pp.235-241
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• 2020

In this paper, we propose the bus/bypass synchronization phase lock loop (B-Sync PLL) method using each phase voltage controller of a parallel UPS inverter. The B-Sync PLL included in each phase voltage control system of parallel UPS inverters has the transient response and the phase synchronization error at grid normal or blackout. The validity of this method is verified by simulation and experiment. As a result, the parallel UPS inverters using the proposed method confirmed that the output phase was continuously synchronized when a grid blackout, improving the transient response characteristics for stable load power supply and equal load sharing.

• Proceedings of the KIEE Conference
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• 2005.07c
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• pp.2208-2210
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• 2005

전문적인 지식이 없는 UHF 부분방전 측정장치 사용자를 위해 자동으로 측정된 신호로부터 GIS 내부의 결함을 추론할 수 있는 신경망회로 엔진을 연구하였다. 측정된 방전신호로부터 적절한 변수들을 계산하고 이를 신경망회로를 이용하여 미리 분류한 GIS 결함들 중 가장 유사한 결함을 자동으로 표현하는 기능을 엔진이 가지도록 하였다. 특히 본 엔진은 3상 일괄형 GIS나 GIS의 전압 위상에 동기되지 않은 부분방전 측정시스템에도 방전 원인을 잘 추론함을 실험을 통하여 확인하였다.