• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.49 no.2
• /
• pp.1-8
• /
• 2012

This paper presents the accelerometer which is a key component of TPMS(Tire Pressure Monitoring System). Generally a piezoresistive accelerometer has characteristics of lower cost, better linearity and better immunity about the environmnet noise than a capacitive one. Three types of piezoresistive accelerometers are degined and simulated using ANSYS program. The best one is a piezoresistive sensor which is supported by four beams located at the center of the edge of the mass after comparing the characteristics of resonant frequency of the three types. Considering the sensor size and a simulated maximum stress and maximum displacement, the length of beams is set as $200{\mu}m$. The size of a piezoresistive accelerometer is $3.0mm{\times}3.0mm{\times}0.4mm$. The sensor output is characterized by measuring the output characteristic depending on angle. As a result the offset voltage of the accelerometer is 43.2 mV and its sensitivity is $42.5{\mu}V/V/g$. The temperature bias drift is measured. The shock durability of the sensor is 1500g and the measuring range is 0 ~ 60 g.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
• /
• v.18 no.8
• /
• pp.880-886
• /
• 2007

We have proposed a new "hybrid" envelope elimination and restoration(EER) transmitter architecture using an efficiency optimized power amplifier(PA) and modified bias modulator. The efficiency of the PA at the average drain voltage is very important for the overall transmitter efficiency because the PA operates mostly at the average power region of the modulation signal. Accordingly, the efficiency of the PA has been optimized at the region. Besides, the bias modulator has been accompanied with the emitter follower for the minimization of memory effect. A saturation amplifier, class $F^{-1}$ is built using a 5-W PEP LDMOSFET for forward-link single-carrier wideband code-division multiple-access(WCDMA) at 1-GHz. For the interlock experiment, the bias modulator has been built with the efficiency of 64.16% and peak output voltage of 31.8 V. The transmitter with the proposed PA and bias modulator has been achieved an efficiency of 44.19%, an improvement of 8.11%. Besides, the output power is enhanced to 32.33 dBm due to the class F operation and the PAE is 38.28% with ACLRs of -35.9 dBc at 5-MHz offset. These results show that the proposed architecture is a very good candidate for the linear and efficient high power transmitter.