• Title/Summary/Keyword: 오류정정 출력코드

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Prediction of Protein Subcellular Localization using Label Power-set Classification and Multi-class Probability Estimates (레이블 멱집합 분류와 다중클래스 확률추정을 사용한 단백질 세포내 위치 예측)

  • Chi, Sang-Mun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.18 no.10
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    • pp.2562-2570
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    • 2014
  • One of the important hints for inferring the function of unknown proteins is the knowledge about protein subcellular localization. Recently, there are considerable researches on the prediction of subcellular localization of proteins which simultaneously exist at multiple subcellular localization. In this paper, label power-set classification is improved for the accurate prediction of multiple subcellular localization. The predicted multi-labels from the label power-set classifier are combined with their prediction probability to give the final result. To find the accurate probability estimates of multi-classes, this paper employs pair-wise comparison and error-correcting output codes frameworks. Prediction experiments on protein subcellular localization show significant performance improvement.

The Implementation of Image Transmission System Using Turbo Code (디지털 영상전송용 터보코드 시스템 구현)

  • Lee, Sung-Woo;Baek, Seung-Jae;Park, Jin-Soo
    • Proceedings of the Korea Information Processing Society Conference
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    • 2003.05b
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    • pp.1477-1480
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    • 2003
  • 본 논문에서는 실시간 데이터 및 보안데이터, 영상데이터 통을 전송할 때 잡음으로 인해 발생되는 데이터 오류를 효과적으로 복원하기 위해 오류 정정 능력이 뛰어난 터보코드를 적응하여 신뢰성 있는 영상전송 시스템을 실현하였다. 영상처리 시스템에서는 CCTV, 비디오 카메라 등에서 나오는 NTSC(National Television System Committee) 영상 신호를 비디오 디코더를 통해 A/D 변환하여 출력하였다. 변환된 디지털 영상정보는 두 개의 영상필드로 출력되며 그중 하나의 필드가 선택되는 알고리즘을 EPLD(Erasable Programmable Logic Device) 로직회로로 구성하여 디지털 영상 데이터를 절반으로 줄이는 시스템을 구현하였다. 터보코드의 부호기, 복호기 시스템에서는 실수연산이 가능한 DSP(Digital Signal Processor)를 사용하여 터보코드를 구현하였으며, 터보코드의 성능을 좌우하는 인터리버부분은 블록 인터리버를 적용하여 설계하였다.

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An Adaptive FEC Algorithm for Mobile Wireless Networks (이동 무선 네트워크의 전송 성능 향상을 위한 적응적 FEC 알고리즘)

  • Ahn, Jong-Suk;John Heidmann
    • The KIPS Transactions:PartC
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    • v.9C no.4
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    • pp.563-572
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    • 2002
  • Wireless mobile networks tend to drop a large portion of packets due to propagation errors rather than congestion. To Improve reliability over noisy wireless channels, wireless networks can employ forward error correction (FEC) techniques. Static FEC algorithms, however, can degrade the performance by poorly matching their overhead to the degree of the underlying channel error, especially when the channel path loss rate fluctuates widely. This paper investigates the benefits of an adaptable FEC mechanism for wireless networks with severe packet loss by analytical analysis or measurements over a real wireless network called sensor network. We show that our adaptive FEC named FECA (FEC-level Adaptation) technique improves the performance by dynamically tuning FEC strength to the current amount of wireless channel loss. We quantify these benefits through a hybrid simulation integrating packet-level simulation with bit-level details and validate that FECA keeps selecting the appropriate FEC-level for a constantly changing wireless channel.

Performance Analysis of Turbo Code with Block Interleaver using Hopping Method (호핑방식을 적용한 블록 인터리버을 이용한 터보코드의 성능분석)

  • Kong, Hyung-Yun
    • The KIPS Transactions:PartC
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    • v.9C no.6
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    • pp.857-864
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    • 2002
  • Channel coding is one of the most important things to improve digital communications. In this paper, we analyze the performance of turbo code with block interleaver using hopping algorithm (i. e., non-linear interleaver) for high speed multi-media service. The input and output of conventional block interleaver is achieved by the order of column and row, but hoping algorithm is achieved by hopping the column and row that increase the minimum distance and average distance between the nearest data dually. To verify and compare the performance of an proposed method the computer simulation have been performed using turbo code in gaussian channel environment.

A Physically Unclonable Function based on RC Circuit with a Confidence Signal (신뢰도 신호를 갖는 RC 회로 기반 PUF 설계)

  • Choi, Jione;Kim, Beomjoong;Lee, Hyung Gyu;Lee, Junghee;Park, Aran;Lee, Gyuho;Jang, Woo Hyun
    • Journal of Korea Society of Industrial Information Systems
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    • v.27 no.4
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    • pp.11-18
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    • 2022
  • A physically unclonable function (PUF) is a circuit that generates random numbers by exploiting natural variation. Since it utilizes variations, which cannot be fully controlled, it can be used to generate true random numbers, but environment change may distort the output. In this paper, we propose a PUF with a confidence signal. We designed a PUF that exploits the difference of the time constant of the circuit and verified that different PUFs generate distinct outputs and the same PUF keeps generating similar outputs regardless of the temperature change. Compared to the existing technique, which employs an error correction code, the proposed technique offers the same level of reliability at the 700 times smaller overhead.

PUF Logic Employing Dual Anti-fuse OTP Memory for High Reliability (신뢰성 향상을 위한 듀얼 안티퓨즈 OTP 메모리 채택 D-PUF 회로)

  • Kim, Seung Youl;Lee, Je Hoon
    • Convergence Security Journal
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    • v.15 no.3_1
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    • pp.99-105
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    • 2015
  • A typical SRAM-based PUF is used in random number generation and key exchange process. The generated out puts should be preserved, but the values are changed owing to the external environment. This paper presents a new D-PUF logic employing a dual anti-fuse OTP memory to the SRAM-based PUF. The proposed PUF can enhance the reliability of the logic since it can preserve the output values. First, we construct the OTP memory using an anti-fuse. After power up, a SRAM generates the random values owing to the mismatch of cross coupled inverter pair. The generated random values are programed in the proposed anti-fuse ROM. The values that were programed in the ROM at once will not be changed and returned. Thus, the outputs of the proposed D-PUF are not affected by the environment variable such as the operation voltage and temperature variation, etc. Consequently, the reliability of the proposed PUF will be enhanced owing to the proposed dual anti-fuse ROM. Therefore, the proposed D-PUF can be stably operated, in particular, without the powerful ECC in the external environment that are changed.

Design of a Low Power Turbo Decoder by Reducing Decoding Iterations (반복 복호수 감소에 의한 저전력 터보 복호기의 설계)

  • Back, Seo-Young;Kim, Sik;Back, Seo-Young
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.1C
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    • pp.1-8
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    • 2004
  • This paper proposes a novel algorithm for a low power turbo decoder based on reduction of number of decoding iterations, targeting power-critical mobile communication devices. Previous researches that attempt to reduce number of decoding iterations, such as CRC-aided and LLR methods, either show degraded BER performance in return for reduced complexity or require additional hardware resources for controlling the number of iterations to meet BER performance, respectively. The proposed algorithm can reduce power consumption without degrading the BER performance, and it is achieved with minimal hardware overhead. The proposed algorithm achieves this by comparing consecutive hard decision results using a simple buffer and counter. Simulation results show that the number of decoding iterations can be reduced to about 60% without degrading the BER performance in the proposed decoder, and power consumption can be saved in proportion to the number of decoding iterations.