• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.9
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• pp.714-723
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• 2003

An effective technique to increase the signal swing and reduce noise is to use fully-differential -circuits. However, design of a common-mode feedback (CMFB) circuit that stabilizes the common-mode output level is essential. In this paper, a general description is given to fully-differential amplifiers with their CMFB loops, then a new error amplifier that is just composed of transistors and stabilizes the DC output level is proposed. We designed a simple and efficient bias circuit that allows the stability and maximum input swing. Simulation result shows the enhanced phase margin and increased differential-mode input swing with a proposed error amplifier.

• Journal of Navigation and Port Research
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• v.27 no.2
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• pp.209-215
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• 2003

In this paper. We tested and fabricated the error amplifier for the 15 Watt linear power amplifier for the IMT-2000 baseband station. The error amplifier was comprised of subtractor for detecting intermodulation distortion, variable attenuator for control amplitude, variable phase shifter for control phase, low power amplifier and high power amplifier. This component was designed on the RO4350 substrate and integrated the aluminum case with active biasing circuit. For suppression of spurious, the through capacitance was used. The characteristics of error amplifier measured up to 45 dB gain, $\pm$0.66 dB gain flatness and -15 dB input return loss. Results of application to the 15 Watt feedforward Linear Power Amplifier, the error amplifier improved with 27 dB cancellation from 34 dBc to 61 dBc IM$_3$.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.1
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• pp.116-123
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• 2000

This paper presents a linearizer using the feedforward loop which can be applied to PCS base-station applications. This linearizer used a IM amplifier and an auxiliary amplifier in order to remove delay lines used in the predistortor using the feedforward technique. The delay line in error loop is changed by the main power amplifier(PA) and the error amplifier is utilized to amplify the error signal which fed to the output of main amplifier. The linearizer was simulated by HP ADS ver 1.1 and fabricated on GML 1000 with thickness of 0.8 mm and dielectric constant of 3.2. Two-tone signals at 1.85 GHz and 1.851 GHz with -7dBm/tone from synthesizers are injected into the main PA. The main PA with a 27 dB gain and a $P_{1dB}$ of 29 dBm(two-tone) was utilized. The reduction of intermodulation distortion (IMD) is around 17 dB.

• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.109-120
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• 2005

In this paper, bit error rate (BER) characteristics, sensitivity and minimum allowable launching power are numerically investigated as a function of amplifier spacing that consisted of 1,200 km WDM systems with MSSI method. It is conformed that the sensitivity and minimum allowable launching power are gradually degraded as amplifier spacings are gradually expanded, but those are not largely affected by modulation format. The sensitivity of RZ transmission system is smaller than that of NRZ transmission system, but minimum allowable launching power of NRZ transmission system is smaller than that of RZ transmission system. And, it is confirmed that the best amplifier spacing in NRZ and RZ transmission system is less than 50 km, because the sensitivity and minimum allowable launching power are less affected by fiber dispersion, channel wavelength and pump light power.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.36S no.5
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• pp.122-131
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• 1999

저주파의 아날로그 신호를 디지털 신호로 변환하기 위해 sigma-delta 아날로그-디지털 변환기의 이용이 용이하다. 이 변환기는 변조기와 디지털 필터로 구성되는데 본 논문에서는 변조기에 대해서만 언급한다. 모델링을 통해 14비트 분해능을 갖는 2차 sigma-delta 변조기를 설계하기 위한 변조기의 구성요소 즉 연산 증폭기, 적분기, 내부 ADC 및 DAC의 최대 허용 에러 범위를 규정하였으며, 이를 토대로 연산증폭기, 2비트 ADC 및 DAC 등을 설계·검증하고, 이들을 서로 연결하여 2차 sigma-delta 변조기를 구성하였다. 3비트 ADC의 기준전압을 조절하여 변조기 성능 향상을 도모하였으며, 내부 DAC를 축전기 및 간단한 제어회로로 구성하여 비선형성 에러를 최소화하였다. 설계된 각각의 구성요소들은 모델링에서 정의된 에러 범위를 모두 만족하였으며, 전체 변조기는87㏈의 입력범위와 87㏈의 최대 신호 대 잡음 비를 가졌다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.5
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• pp.1310-1318
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• 1998

Sigma-delta converter is frequently used for conyerting low-frequency anglog to digital signal. The converter consists of a modulator and a digital filer, but our work is concentrated on the modulator. In this works, to design second-order sigma-dalta modulator with 14bit resolution, we define maximumerror limits of each components (operational smplifier, integrator, internal ADC, and DAC) of modulator. It is first performed modeling of an ideal second-order sigma-delta modulator. This is then modified by adding the non-ideal factors such as limit of op-amp output swing, the finit DC gain of op-amp slew rate, the integrator gian error by the capacitor mismatch, the ADC error by the cmparator offset and the mismatch of resistor string, and the non-linear of DAC. From this modeling, as it is determined the specification of each devices requeired in design and the fabrication error limits, we can see the final performance of modulator.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.12
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• pp.1205-1214
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• 2013

Recently spaceborne SAR systems are increasing image resolution and frequency. As a high quality image resolution, the wider bandwidth is required and a wideband signal generator with RF component is very complicated and RF impairments of device is increased. Therefore, it is very important to improve performance by reducing these errors. In this study, the transmission signal of the wideband signal generator is applied to the phase noise, IQ imbalance, ripple gain, nonlinear model of high power amplifier. And we define possible structures of wideband signal generator and measure the PSLR and ISLR for the performance assesment. Also, we extract error of the amplitude and phase from the waveform and use a quadratic polynomial curve fitting and examine the performance change due to nonlinear device. Finally, we apply a high power amplifier predistortion method for non-linear error compensation. And we confirm that distortion in the output of the amplifier by intermodulation component is decreased by 15 dB.

• Journal of IKEEE
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• v.3 no.2 s.5
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• pp.215-220
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• 1999

In fabricated linear power amplifier(LPA), the third-order inter-modulation distortion(IMD) for main amplifier alone is 10.61dBc, and the IMD for LPA with predistorter and feedforward loop combined is 32.50dBc. Therefore, the IMD characteristic results an improvement of approximately 22dB. The main amplifier efficiency with single tone input is close to 30%, and the efficiency of the overall LPA with predistorter is 27.4% and predicted feedforward loop efficiency without predistorter is about 20%. Therefore, LPA with predistorter and feedforward loop combined is improved by 7.4%.

• Proceedings of the KAIS Fall Conference
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• 2008.11a
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• pp.219-222
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• 2008

본 논문에서는 WDM시스템에서 사용될 수 있는 광전치증폭기의 수신감도를 해석하였다. $10^{-9}$의 에러확률에 대하여 FSK전송을 이용하여 비트당 광자수를 계산하여다. 결과로 일반적인 PIN 수신기의 수신감도는 $9.2{\times}10^4$ photon/bit이고, 광전치증폭수신기의 경우는 $7{\times}10^2$의 phton/bit를 갖음을 확인하였다. 또한 FSK전송의 경우에는 표준에러확률인 $10^{-9}$을 유지하기 위해 필요로 하는 비트당 광자의 수를 계산하였는데, 가우시안 근사해석법을 사용한 경우와 정확한 해석법(k자승법)을 이용한 결과 m=30인 경우 k자승법의 경우는 $2.36{\times}10^2$ photon/bit, 가우시안 근사법의 경우에는 $4.01{\times}10^2$ photon/bit을 얻었다. 이를 통해 동일한 BER의 경우에 광전치증폭수신기가 PIN수신기에 비해 우수함을 확인하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.8
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• pp.1407-1413
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• 2000

This paper presents a feedforward linear power amplifier (LPA) using error feedback technique to achieve low intermodulation distortions(IMD) of power amplifiers for base stations. Especially, the proposed linear power amplifier is applied to feedforward technique combined with error feedback technique, which has no loss of amplifier gain unlike typical feedback technique. The proposed LPA is designed by using HP ADS ver. 1.3, fabricated. When two-tone signals at 1850 MHz and 1851.25 MHz with -7 dBm/tone from synthesizers are injected into the main power amplifier with gain of 28 dB and P1dB of 1W, the proposed LPA could reduce more than 35 dB.