• Journal of Software Assessment and Valuation
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• v.17 no.2
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• pp.39-46
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• 2021

To analyze and defend malware codes, reverse engineering is used as identify function location information. However, the stripped binary is not easy to find information such as function location because function symbol information is removed. To solve this problem, there are various binary analysis tools such as BAP and BitBlaze IDA Pro, but they are based on heuristics method, so they do not perform well in general. In this paper, we propose a technique to extract function information using LSTM-based models by applying algorithms of N-byte method that is extracted binaries corresponding to reverse assembling instruments in a recursive descent method. Through experiments, the proposed techniques were superior to the existing techniques in terms of time and accuracy.

• Proceedings of the Korean Society of Computer Information Conference
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• 2023.07a
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• pp.387-388
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• 2023

본 논문에서는 인공지능(AI) 체험부터 초중등, 대학 및 평생교육에서 필요한 광범위한 응용과 활용을 할 수 있는 라이브러리를 디지털북 형태로 지원하며, 블록과 텍스트 코딩의 장점을 취합해 입문자들이 쉽고 재미있게 SW·AI 융합 교육을 할 수 있는 플랫폼을 구현하였다. 플랫폼은 웹어셈블리 기반의 파이오다이드를 통해 웹 브라우저에서 파이썬 코딩을 가능하게 하고 복잡한 설치과정 없이 쉽게 이용이 가능하다. 다양한 LMS와 연동이 가능하도록 API를 제공하며, Drag & Fill 블록으로 입문자가 코딩에 겪는 어려움 중 하나인 많은 양의 함수와 파라미터 사용법의 어려움을 해소하였다. 플랫폼은 블록으로 코딩하여 문법의 어려움, 오탈자, 오류 등을 줄이는 동시에 블록에서 생성되는 파이썬 텍스트 코드로 입문자가 텍스트 코드에 익숙해질 수 있는 경험을 제공한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.12
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• pp.1902-1918
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• 1993

Parallel architecture based on the von Neumann computation model has a limitation as a massively parallel architecture due to its inherent drawback of architectural features. The data-flow model of computation has a high programmability in software perspective and high scalability in hardware perspective. However, the practical programming and experimentaion of date-flow architectures are hardly available due to the absence of practical data-flow, we present a programming environment for performing the data-flow computation on conventional parallel machines in general, loosely compled multiprocessor system in particular. We build an emulator for tagged token data-flow architecture on the iPSC/2 hypercube, a loosely coupled multiprocessor system. The emulator is a shallow layer of software executing on an iPSC/2 system, and thus makes the iPSC/2 system work as a data-flow architecture from the programmer`s viewpoint. We implement various numerical and non-numerical algorithm in a data-flow assembler language, and then compare the performance of the program with those of the versions of conventional C language, Consequently, We verify the effectiveness of this programming environment based on the emulator in experimenting the data-flow computation on a conventional parallel machine.

• Journal of the Institute of Electronics Engineers of Korea SP
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• v.46 no.3
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• pp.119-124
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• 2009

In this paper, AMR-WB+ audio coder is implemented, in real-time, using Intel 400MHz Xscale PXA250 with 32bit RISC processor ARM9E-J(R)core. The assembly code for ARM9E-J(R)core is developed through the serial process of C code optimization, cross compile, assembly code manual optimization and adjusting the optimized code to Embedded Visual C++ platform. C code is trimmed on Visual C++ platform. Cross compile and assembly code manual optimization are performed on CodeWarrior with ARM compiler. Through these stages the code for both ARM EVM board and PDA is implemented. The average complexities of the code are 160.75MHz on encoder and 33.05MHz on decoder. In case of static link library(SLL), the required memories are 65.21Kbyte, 32.01Kbyte and 279.81Kbyte on encoder, decoder and common sources, respectively. The implemented coder is evaluated using 16 test vectors given by 3GPP to verify the bit-exactness of the coder.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.39 no.9
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• pp.893-899
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• 2015

In the design of injection molds, the temperature distribution and deformation of the mold is one of the most important parameters that affect the flow characteristics, flash generation, and surface appearance, etc. Plastic injection analyses have been carried out to predict the temperature distribution of the mold and the pressure distribution on the cavity surface. As the input loads, we transfer the temperature and pressure results to the structural analysis. We compare the structural analysis results with the thermal expansion effect using the actual flash and step size of a smartphone cover part. To reduce the flash problem, we proposed a new mold design, and verified the results by performing simulations.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.1273-1278
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• 2005

In this thesis, a 2 stage 6-pole bandpass filter(BPF) is designed and implemented by using triple-mode cavity for satellite payload system. The BPF has a 100MHz bandwidth at the center frequency of 14.5GHz(Ku-band) and the response of the filter is the Chebyshev function. The cavity filter uses two orthogonal $TE_{113}$ modes and one $TM_{012}$ mode. The coupling between the adjacent cavityes(intercavity coupling) results in a Chebyshev response and is accomplished by only H-filed component of TE modes. The size and location of intercavity slot is determined by the coupling equation from E- and H-field of TE and TM resonant modes in circular cavity. The 2-stage 6-pole triple-mode cavity BPF has the insertion loss of 2.4dB and the reflection loss of 15dB in the passband. The triple-mode BPF proposed in this thesis can be used as channel filters for satellite payload system and can minimize filter assembly in general wireless communication system.

• Transactions of the KSME C: Technology and Education
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• v.4 no.1
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• pp.63-71
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• 2016

Although mechatronics education in a mechanical engineering curriculum is recently recognized as important, its experimental education has been done generally in the laboratory equipped with all the apparatus and could not be done at home by students. This paper introduces experimental educations on mechatronics, e.g., digital logic circuits, 7-segment LED drive, square wave generation, microcontroller programming using assembly and C languages, timer interrupt, and step motor drive using a small 5 V power supply, a breadboard, various electronic and electric components, a microcontroller and its programmer, a step motor, and a student's PC. In the developed mechatronics course, experimental educations are scheduled in parallel with content's lectures together, and cheap and economic experimental environment is prepared for students in which students can easily practice experimental works in advance or later at home by themselves.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.3
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• pp.1091-1097
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• 2011

This study aims to develop the plastic suspension assembly which is installed on inside of vehicle seat and supports passenger's back to provide the comfortable feeling. This design is the suspension structure to support the back equally and assemble seat back frame and plastic suspension effectively. The parts of suspension are designed by considering the property of body pressure distribution. As analysis values are approached to measured values by comparing the deformations in the cases of existed spring suspension and developed plastic suspension, the optimum design can be established.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.11 no.1
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• pp.18-25
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• 2018

In this paper, we present a low-power implementation of the multi-channel hearing aid system using a general-purpose DSP chip. The system includes an acoustic amplification algorithm based on Wide Dynamic Range Compression (WDRC), an adaptive howling canceller, and a single-channel noise reduction algorithm. To achieve a low-power implementation, each algorithm is re-constructed in forms of integer program, and the integer program is converted to the assembly program using BelaSigna(R) 250 instructions. Through experiments using the implementation system, the performance of each processing algorithm was confirmed in real-time. Also, the clock of the implementation system was measured, and it was confirmed that the entire signal processing blocks can be performed in real time at about 7.02MHz system clock.

• The KIPS Transactions:PartA
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• v.14A no.2
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• pp.91-98
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• 2007

Generally, virtual machine platform is composed of a compiler, an assembler, and VM(Virtual Machine). To develop it, the design of VMC(Virtual Machine Code) is an essential task. And it is very important to verify the virtual machine platform. To do this and furthermore to execute VMC, it needs to implement VMC execution system using compiling method, interpreting method, or decompiling method. In this paper, we suggested and implemented the executing system of VMC using decompiling method out of three methods to execute the VMC. In our implementation, the VMC is SIL(Standard Intermediate Language) that is an intermediate code of EVM(Embedded Virtual Machine). Actually, we verified the usefulness of the decompiling method. And the decompiling method suggested in this paper can be used to minimize the mistake in developing Virtual machine platform.