• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.202-202
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• 2008

실리콘 기판 위에 성장된 세륨 산화막(CeO2)은 고품질의 SOI(Silicon on Insulator)나 혹은 안정한 캐패시터 소자와 같은 반도체 소자에 대한 응용 가능성이 높아 여러 연구가 진행되어 왔다. 세륨 산화막은 형석 구조, 다시 말해서 대칭적인 큐빅 구조이며 화학적으로 안정한 물질이다. 또한, 세륨 산화막의 격자상수 (a = $5.411\AA$)는 실리콘의 격자상수 (a = $5.430\AA$) 와 비슷하며 큰 밴드갭(6eV) 및 높은 유전상수 ($\varepsilon$ = 26), 높은 열적 안전성을 지니고 있어 실리콘 기판에 사용된 기존 절연막인 사파이어나 질코늄 산화막보다 우수한 특성을 지니고 있다. 본 논문에서는 스퍼터링을 이용하여 세륨 산화막을 실리콘 기판 위에 형성하면서 기판가열 온도 조건을 각각 상온, $100^{\circ}C$, $200^{\circ}C$로 설정하였으며, 세륨 산화막의 증착 두께 조건을 각각 80nm, 120nm로 설정한 다음 퍼니스를 이용하여 $1100^{\circ}C$에서 1시간 동안 열처리를 거친 세륨 산화막의 결정화 형태 및 박막의 막질 상태를 각각 X선 회절 장치 (XRD) 및 주사전자현미경 (SEM)으로 관찰하였다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.11a
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• pp.591-593
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• 2003

Silicone composites for high voltage insulator(HVI SC) were prepared by adding aluminum trihydrate(ATH) treated by surface treatment agent to base silicone compound at the ratio of 100:20, 100:40, 100:60, 100:80, and 100:100, respectively. And also, ATH was treated by various surface treatment agents, such as stearic acid, acryl silane vinyl silane under compounding process. electrical properties were investigated for the various contents of ATH and solace-treatment agents we mlas ured volume resistivity, breakdown and tracking resistance were for HVISC containing ATH treated by viuyl silane.

• 대한방사선방어학회:학술대회논문집
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• 2009.04a
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• pp.100-101
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• 2009

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.1
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• pp.16-22
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• 2008

We fabricated thermally-evaporated 10 nm-Ni/30 nm and 70 nm Poly-Si/200 nm-$SiO_2/Si$ structures to investigate the thermal stability of nickel silicides formed by rapid thermal annealing(RTA) of the temperature of $300{\sim}1100^{\circ}C$ for 40 seconds. We employed for a four-point tester, field emission scanning electron microscope(FE-SEM), transmission electron microscope(TEM), high resolution X-ray diffraction(HRIXRD), and scanning probe microscope(SPM) in order to examine the sheet resistance, in-plane microstructure, cross-sectional microstructure evolution, phase transformation, and surface roughness, respectively. The silicide on 30 nm polysilicon substrate was stable at temperature up to $900^{\circ}C$, while the one on 70 nm substrate showed the conventional $NiSi_2$ transformation temperature of $700^{\circ}C$. The HRXRD result also supported the existence of NiSi-phase up to $900^{\circ}C$ for the Ni silicide on the 30 nm polysilicon substrate. FE-SEM and TEM confirmed that 40 nm thick uniform silicide layer and island-like agglomerated silicide phase of $1{\mu}m$ pitch without residual polysilicon were formed on 30 nm polysilicon substrate at $700^{\circ}C\;and\;1000^{\circ}C$, respectively. All silicides were nonuniform and formed on top of the residual polysilicon for 70 nm polysilicon substrates. Through SPM analysis, we confirmed the surface roughness was below 17 nm, which implied the advantage on FUSI gate of CMOS process. Our results imply that we may tune the thermal stability of nickel monosilicide by reducing the height of polysilicon gate.

• Journal of the Korean Vacuum Society
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• v.21 no.1
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• pp.62-68
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• 2012

The conversion efficiency of solar cells depending on incident angle of light is important for building-integrated photovoltaics (BIPV) applications. The quantum efficiency is the ratio of the number of charge carriers collected by the solar cell to the number of photons of a given energy shining on the solar cell. The analysis of angle dependence of quantum efficiencies give more information upon the variation of power output of a solar cell by the incident angle of light. The variations in power output of solar cells with increasing angle of incidence is different for the type of cell structures. In this study we present the results of the quantum efficiency measurement of single-crystalline silicon solar cells and a-Si:H thin-film solar cells with the angle of incidence of light. As a result, as the angle of incidence increases in single-crystalline silicon solar cells, quantum efficiency at all wavelength (300~1,100 nm) of light were reduced. But in case of a-Si:H thin-film solar cells, quantum efficiency was increased or maintained at the angle of incidence from 0 degree to about 40 degrees and dramatically decrease at more than 40 degrees in the range of visible light. This results of quantum efficiency with increasing incident angle were caused by haze and interference effects in thin-film structure. Thus, the structural optimization considering incident angle dependence of solar cells is expected to benefit BIPV.

• Journal of IKEEE
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• v.12 no.3
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• pp.131-137
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• 2008

A silicon Fabry-Perot tunable thermo-optic filter for WDM using the thin film silicon coating is proposed and experimented. The filter is implemented by using the CMP process and polishing both sides of the commercial silicon wafer with normal thickness of 100${\mu}m{\pm}$1%. The filter also has 2-layer or 3-layer dielectrics thin film coating mirror which are alternated ${\lambda}$/4 layers of $SiO_2$($n_{low}$=1.44) and a-Si($n_{high}$=3.48) for the central wavelength of 1550nm by RF sputtering. The experiment shows that FSR is 3.61nm and FWHM is 0.56nm and the finesse is 6.4 for 2-layer mirror with the reflection of 61%, and that FSR is 3.36nm and FWHM is 0.13nm and the finesse is 25.5 for 3-layer mirror with the reflection of 89%. According to thermo-optic effect, the transmitted central wavelength of 1549.73nm at $23^{\circ}C$ is shifted to 1550.91nm at $30^{\circ}C$ and 1553.46nm at $60^{\circ}C$ for 2-layer mirror, and the transmitted central wavelength of 1549.83nm at $23^{\circ}C$ is shifted to 1550.92nm at $30^{\circ}C$ and 1553.07nm at $60^{\circ}C$ for 3-layer mirror.

• Journal of the Microelectronics and Packaging Society
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• v.14 no.2 s.43
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• pp.17-21
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• 2007

Dense and periodic arrays of holes and Si nano dots were fabricated on silicon substrate. The nanopatterned holes were approximately $15{\sim}40nm$ wide, 40 nm deep and $40{\sim}80\;nm$ apart. To obtain nano-size patterns, self?assembling diblock copolymer were used to produce layer of hexagonaly ordered parallel cylinders of polymethylmethacrylate (PMMA) in polystyrene(PS) matrix. The PMMA cylinders were degraded and removed with acetic acid rinse to produce a PS. $100\;{\AA}-thick$ Au thin film was deposited by using e-beam evaporator. PS template was removed by lift-off process. Arrays of Au nano dots were transferred by using Fluorine-based reactive ion etching(RE). Au nano dots were removed by sulfuric acid. Si nano dots size and height were $30{\sim}70\;nm$ and $10{\sim}20\;nm$ respectively.

• Korean Journal of Optics and Photonics
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• v.20 no.4
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• pp.211-216
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• 2009

Much research into two-dimensional (2-D) photonic crystal (PC) structures has been conducted for realization of ultrasmall optical integrated circuits. A 2-D silicon (Si) PC slab structure with air cladding (n=1) is one of the representative structures in 2-D PCs. While air-clad Si PC slab structures have good optical characteristics, their suspension in air can lead to mechanical weakness, making integration with some optical devices difficult. In this paper, we propose improving the mechanical robustness of PC structure by developing a 2-D Si PC structure with symmetric silica cladding (n=1.44) and comparing its optical properties to that of the air-clad structure. First, we investigate the optical properties of a 2-D Si PC slab structure with air cladding by using a 3-D finite difference time domain method. We determined that a photonic bandgap of 330 nm and a non-leaky propagating bandwidth of 100 nm in the optical communication range are possible. Next, we investigate the optical properties of 2-D Si PC slab structures with silica cladding. Even though the refractive index of the silica cladding is higher than that of air, we developed a silica-clad structure with good optical properties: a photonic band gap of approximately 230 nm and a non-leaky propagating bandwidth of 90 nm, comparable to that of the air-clad PC structures.

• Korean Journal of Optics and Photonics
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• v.19 no.1
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• pp.20-24
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• 2008

A color filter was proposed and demonstrated by incorporating a subwavelength patterned 1-dimensional grating in poly silicon. It was produced by employing the laser interference lithography method, providing much wider effective area compared to the conventional e-beam lithography. A $SiO_2$ layer was introduced on top of the silicon grating layer as a mask for the etching of the silicon, facilitating the etching of the silicon layer. It was theoretically found that the selectivity of the filter was also improved thanks to the oxide layer. The parameters for the designed device include the grating pitch of 450 nm, the grating height of 100 nm and the oxide-layer height of 200 nm. As for the fabricated filter, the spectral pass band corresponded to the blue color centered at 470 nm and the peak transmission was about 40%. Within the effective area of $3{\times}3mm^2$, the variation in the relative transmission efficiency and in the center wavelength was less than 10% and 2 nm respectively. Finally, the influence of the angle of the incident beam upon the transfer characteristics of the device was investigated in terms of the rate of the relative transmission efficiency, which was found to be equivalent to 1.5%/degree.

• Journal of the Korean Vacuum Society
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• v.20 no.3
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• pp.225-232
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• 2011

Reactive ion etching (RIE) technique for maskless surface texturing of mc-silicon solar wafers has been applied and succeed in fabricating a grass-like black-silicon with an average reflectance of $4{\pm}1%$ in a wavelength range of 300~1,200 nm. In order to investigate the optimized texturing conditions for mass production of high quantum efficiency solar cell Surface characteristics such as the spatial distribution of average reflectance, micrscopic surface morphology and minority carrier lifetime were monitored for samples from saw-damaged $15.6{\times}15.6\;cm^2$ bare wafer to key-processed wafers as well as the mc-Si solar cells. We observed that RIE textured wafers reveal lower average reflectance along from center to edges by 1% and referred the origin to the non-uniform surface structures with a depth of 2 times deeper and half-maximum width of 3 times. Samples with anti-reflection coating after forming emitter layer also revealed longer minority carrier lifetime by 40% for the edge compared to wafer center due to size effects. As results, mc-Si solar cells with RIE-textured surface also revealed higher efficiency by 2% and better external quantum efficiency by 15% for edge positions with higher height.