• Title/Summary/Keyword: 신호변환기

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Compensation of Timing Offset and Frequency Offset in the Multi-Band Receiver with Sub-Sampling Method (Sub-Sampling 방식의 다중 대역 수신기에서 타이밍 오프셋과 주파수 오프셋 보상)

  • Lee, Hui-Kyu;Ryu, Heung-Gyoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.22 no.5
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    • pp.501-509
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    • 2011
  • Software defined radio(SDR) has a goal that places the analog-to-digital converter(ADC) as near the antenna as possible. But current technique actually can't do analog-to-digital converting about RF band signals. So one method is studying that samples RF band signals to IF band. One of the ways Sub-Sampling technique can convert signals from RF band to IF band without oscillator. If Sub-Sampling technique is used, over 2 bands can convert signals from RF band to IF band. But due to the filter performance in RF band, it is possible to generate interference between signals that is converted in low frequency band. The effect degrades performance. In this paper, we propose one method that uses time division multiplexing(TDM) method as a solution to avoid interference between signals. By doing TDM and Sub-Sampling at the same time that method can get signals without large changes of structures.

The Linearity Analysis of Low Noise Down-Converter for Ka-band UHD Satellite-broadcasting (Ka-대역 UHD 위성방송용 저 잡음 하향변환기의 선형성 분석)

  • Mok, Gwang-Yun;Rhee, Young-Chul
    • The Journal of the Korea institute of electronic communication sciences
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    • v.12 no.2
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    • pp.267-272
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    • 2017
  • In this paper, we suggested that a RF-front module of down-converter that represents the lowest noise figure to receive high quality video signals because the attenuation occurs in the atmosphere over 20GHz. By budget analysis of CDR, SFDR and CIP3 of RF-FEM, we also analyzed the parameters and linearity that presents high dynamic range. The total gain of designed Ka-band down-converter is 61.8dBand noise figure is 1.05dB, so gain and noise figures show excellent properties. In the future, the designed RF-FEM will be applied to the Ka-band satellite down-converter for UHD-class video transmission.

Design and Implementation for DC Motor controller Using Embedded Target (Embedded Target을 이용한 DC Motor제어가 설계 및 구현)

  • Shin, Wee-Jae
    • Journal of the Institute of Convergence Signal Processing
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    • v.13 no.1
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    • pp.56-62
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    • 2012
  • This paper presents design and implementation of the speed controller for DC motor system using Embeded Target for TI C2000 DSP library in Matlab/Simulink is introduced. Speed controller are easily design and implemented by using the Matlab/Simulink program. Feedback of motor speed is processed through eZdsp F2812 AID converter using encoder and pulse meter as speed sensor. Real-time program of controller is drawn using Simulink and converted program code for speed control of P control, PID control and parameter estimation base adaptive control is downloaded into the TI eZdsp 2812 board. Experiments were carried out to examine validity of speed response for implemented controllers. And even if controlled plant becomes alteration studied controller design and implementation easily method.

Analysis and Optimization of the Phase Noise of the Local Oscillator Signal for the CDMA Mobile Station (CDMA단말기의 LO 신호 위상 잡음에 의한 영향 분석 및 최적화)

  • 이상원;한명석;김학선;홍신남
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.4C
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    • pp.380-387
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    • 2002
  • In this paper, the effect of the phase noise of a local oscillator on the ACPR of a transmitter and the reception sensitivity of a receiver to meet the TIA/EIA/IS-98-D for the CDMA mobile station was analyzed. And the optimum condition for performance of the local oscillator was suggested. It was found that the phase noise level of the local oscillator in a receiver and a transmitter should be below -138.3dBc/Hz and -120dBc/Hz, respectively, at 900kHz offset. It was confirmed that the reception sensitivity and ACPR efficiency were satisfactory when the signal of the local oscillator to the down-converter of a receiver with the phase noise level of less than -138.3dBc/Hz is supplied to the up-converter of the transmitter.

Analysis of the PZT trasducer's response for the transient elastic waves (과도탄성파에 대한 PZT 변환자의 응답특성 해석)

  • 배종성
    • Proceedings of the Acoustical Society of Korea Conference
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    • 1998.06d
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    • pp.9-12
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    • 1998
  • 공기경계층을 갖는 유리평판에서 힘의 크기가 10N이고 상승시간이 약 280ns 인 경사 점하중이 인가된 경우에 대하여 진앙점에서 입자 변위와 입자 속도를 계산하였다. 이론적으로 계산된 수직성분이 입자속도가 PZT변환자에 입사한다고 가정하여 PZT 변환자의 과도 응답특성을 Mason 등가회로와 격자점을 이용하여 계산하였다. 유리모세관의 파과시에 방출괴는 과도탄성파를 이용하여 유리평판의 진앙점에서 PZT 변환기의 응답을 조사하였고, 이론과 비교한 결과 상당히 일치하였다. 이를 이용하여 음향방출 시스템인 발생원, 전파매질, 변환자 및 신호분석시스템을 수학적으로 모형화할 수 있는 기초를 마련하였다.

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Investigation of miximum permitted error limits for second order sigma-delta modulator with 14-bit resolution (14 비트 분해능을 갖는 2차 Sigma-Delta 변조기 설계를 위한 구성요소의 최대에러 허용 범위 조사)

  • Cho, Byung-Woog;Choi, Pyung;Sohn, Byung-Ki
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.23 no.5
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    • pp.1310-1318
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    • 1998
  • Sigma-delta converter is frequently used for conyerting low-frequency anglog to digital signal. The converter consists of a modulator and a digital filer, but our work is concentrated on the modulator. In this works, to design second-order sigma-dalta modulator with 14bit resolution, we define maximumerror limits of each components (operational smplifier, integrator, internal ADC, and DAC) of modulator. It is first performed modeling of an ideal second-order sigma-delta modulator. This is then modified by adding the non-ideal factors such as limit of op-amp output swing, the finit DC gain of op-amp slew rate, the integrator gian error by the capacitor mismatch, the ADC error by the cmparator offset and the mismatch of resistor string, and the non-linear of DAC. From this modeling, as it is determined the specification of each devices requeired in design and the fabrication error limits, we can see the final performance of modulator.

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Design of 2.5 Gbps CMOS LD driver (2.5 Gbps CMOS LD 구동기 설계)

  • Kim Kyung-Min;Choi Jin-Ho;Choi Young-Wan;Jo Won-Jin
    • 한국정보통신설비학회:학술대회논문집
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    • 2004.08a
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    • pp.37-40
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    • 2004
  • 본 논문에서는 $0.35{\mu}m$ CMOS공정을 이용하여 2.5 Gbps로 동작하는 LD(Laser Diode) 구동기를 설계하였다. 전기 신호를 광 신호로 변환시켜 주는 레이저 다이오드(LD)를 동작시키기 위해서는 LD 구동기가 필요하게 되며, LD 구동기는 크게 LD 문턱전류 이상의 전류를 공급하기 위한 바이어스부와 바이어스 전류를 기반으로 전기신호를 광신호로 변조하는 변조부로 나뉘어 진다. 설계한 LD 구동기는 LD의 등가회로를 이용하여 모의실험 과정을 거쳤으며, MOSFET의 GATE단에 안정된 입력전압을 인가함으로써 안정된 바이어스 전류의 공급을 꾀하였다. 디자인된 LD 구동기는 11 mA 정도의 바이어스 전류를 공급하여 주었으며, 4 mA 정도의 변조전류를 공급한다.

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애널로그 및 디지탈계측의 기초개념과 응용(I)

  • 고명삼
    • Journal of the KSME
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    • v.25 no.2
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    • pp.130-136
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    • 1985
  • 확정적 계측신호에 극한시키며 현장 혹은 연구실에 종사하고 있는 기계기술자에게 필요로 하는 애널로그계측과 디지틀계측의 특성과 계측시스템의 구성, 연산증폭기(Op. Amp)의 원리 및 응용, 측정신호의 선형화, 마이크로 프로세서의 원리 A/D, D/A 변환기의 원리 및 응용, 자료처리시 스템, 센서의 원리 및 응용, 디지틀계측시스템의 최근동향등 메카트로닉스시대에서 요청되는 계 측공학의 주요과제에 대하여 기술한다.

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The Nonlinear Equalizer for Super-RENS Read-out Signals using an Asymmetric Waveform Model (비대칭 신호 모델을 이용한 super-RENS 신호에서의 비선형 등화기)

  • Moon, Woosik;Park, Sehwang;Lee, Jieun;Im, Sungbin
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.5
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    • pp.70-75
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    • 2014
  • Super-resolution near-field structure (super-RENS) read-out samples are affected by a nonlinear and noncausal channel, which results in inter-symbol interference (ISI). In this study, we investigate asymmetry or domain bloom in super-RENS in terms of equalization. Domain bloom is caused by writing process in optical recording. We assume in this work that the asymmetry symbol conversion scheme is to generate asymmetric symbols, and then a linear finite impulse response filter can model the read-out channel. For equalizing this overall nonlinear channel, the read-out signals are deconvolved with the finite impulse response filter and its output is decided based on the decision rule table that is developed from the asymmetry symbol conversion scheme. The proposed equalizer is investigated with the simulations and the real super-RENS samples in terms of raw bit error rate.

An Implementation of Timing Signal Generation Board for 3D Pulse Radar Testing Systems (3차원 펄스 레이다 시험용 타이밍 신호 발생기 구현)

  • Lee, Jong-Pil;Rhee, Ill-Keun;Kim, Hyoun-Ju
    • Journal of IKEEE
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    • v.9 no.2 s.17
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    • pp.136-142
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    • 2005
  • This paper describes some major schemes for developing timing signal generator which can be used for testing of 3D radars. The developed generator has a function not only to simulate information on elevation angle for the simulated target signals but also to generate a modulated signal up to 80MHz. Because this generator has an internal modulating function instead of an external modulating function and has sufficient memory enough to change the parameters according to operating programs, it realization of various test-environments for testing a radar can be made with easy and with low expense.

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