• 전기의세계
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• v.16 no.3
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• pp.9-15
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• 1967

현금까지 R.I.스칸닝은 방사선검출기에서 얻어지는 디지탈신호를 계수율계를 통하여 아날로그 신호화하므로써 기록제어를 하고 있는데, 본 연구에 있어서는 디지탈신호를 아날로그 신호화하는 보고의 변환과정에 있어서, 정보원리상 정보손실이 불가변하며 실지로 계수율계의 시정수에 의한 시지연이 해상력에 큰 악영향을 미침에 착안하여, 검출기에서 얻어지는 디지탈신호를 정보변환을 하지 않고 그대로 이용한 디지탈제어에 의해서 기록방식을 개발하였다. 이로써 해상력의 향상과 아울러 기록동작을 순정자식화하여, 기록기구의 간소화와 경제화를 이룩하였다. 본 논문은 정보이론을 기초로하여 이론을 전관하고, 기록제어에 있어서의 최적조건을 제시하였으며, 이에 입각하여 설계시작한 색기록(Color Scanning)과 다중기록을 동시에 할 수 있는 개발된 R.I. Scanning의 설계내용과 그 시험결과를 제시하였다.

• Journal of IKEEE
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• v.13 no.1
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• pp.77-86
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• 2009

A wavelet Electrocardiogram(ECG) detector and its analog-to-digital converter(ADC) for low-power implantable cardiac pacemakers are presented in this paper. The proposed wavelet-based ECG detector consists of a wavelet decomposer with wavelet filter banks, a QRS complex detector of hypothesis testing with wavelet-demodulated ECG signals, and a noise detector with zero-crossing points. To achieve high-detection performance with low-power consumption, the multi-scaled product algorithm and soft-threshold algorithm are efficiently exploited. To further reduce the power dissipation, a low-power ADC, which is based on a Successive Approximation Register(SAR) architecture with an on/off-time controlled comparator and passive sample and hold, is also presented. Our algorithmic and architectural level approaches are implemented and fabricated in standard $0.35{\mu}m$ CMOS technology. The testchip shows a good detection accuracy of 99.32% and very low-power consumption of $19.02{\mu}W$ with 3-V supply voltage.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2007.11a
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• pp.81-83
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• 2007

본 논문에서는 다양한 분야에서 응용될 수 있는 아날로그 신호를 디지털 신호로 변환하는 회로를 이용한 전자식 안정기를 구성하였다. 회로의 구성은 온도센서를 이용하여 안정기 ON/OFF 제어를 통한 냉음극 형광램프의 색을 제어하였고 온도센서뿐만 아니라 광센서, 가변저항, 음성센서 등 거의 모든 아날로그 신호의 센서를 사용 할 수 있도록 구성하였다.

• Proceedings of the KIEE Conference
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• 2001.11c
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• pp.383-386
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• 2001

본 논문에서는 전력과 대역특이 제한된 환경에서 효율적인 트렐리스 부호화 변조방식을 적용한 QAM 모뎀을 구현하였다. 입력되는 데이터를 트렐리스 부호화 변조한 후 I, Q로 분리된 신호는 신호 사상기를 통하여 해당하는 성 상점으로 변환된다. 복조기는 I, Q의 신호를 트렐리스 복호기에 입력하여 데이터를 복구한다. 변복조기의 구현은 Xilinx사의 FPGA 디자인툴인 Foundation을 사용하여 VHDL simulation과 Chip Targeting을 수행하였다.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2002.12a
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• pp.423-426
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• 2002

Fourier 변환은 연속이며, 무한 회 미분 가능한 함수인 반면, Wavelet 변환은 시간적으로도, 주파수적으로도 국재화 시키는 함수를 사용하는 점에서 차이가 있다. Fourier 변환에 비해 Wavelet 변환은 고주파 성분에 대해서는 시간 분해능이 높고, 저주파 성분에 대해서는 주파수 분해능이 높아지므로, 주어진 신호에 대한 지식이 없이도 시간-주파수 해석이 가능하고, 고주파 성분을 갖는 특이점의 검출에도 적합하다. 그러므로 Wavelet 변환의 이러한 성질을 이용하여 변압기의 출고전 권선의 완전한 절연을 검증하고자 한다. 이때 시행하는 뇌 임펄스 내전압 시험 시 나타난 푸리에 변환과 Wavelet 변환 곡선을 비교 분석 및 해석을 통하여 유의수준 및 신뢰 구간 둥의 통계학적 분석을 이용, 해석하여 보다 정확한 그래프를 산출하므로서 과도구간에 대한 정밀한 해석을 하고자 한다.

• Composites Research
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• v.20 no.3
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• pp.31-36
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• 2007

A quantitative prediction method for initial crack length in a carbon/epoxy (CF/EP) composite beam using active piezoelectric transducers was established in this study. Wavelet Transform (WT)-based signal processing and identification technique in time-frequency domain was developed to facilitate the determination of damage presence and severity. Dynamic response of a CF/EP composites beam containing a continuously expanding crack, coupled with a pair of active piezoelectric disks, was examined under a narrow band excitation, and then applied with the proposed signal processing technique.

• Journal of the Institute of Convergence Signal Processing
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• v.8 no.4
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• pp.272-278
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• 2007

In this paper, we present an automated API translator for embedded software development based on a model-driven approach. Since MDA(Model Driven Architecture) provides little support for the development of embedded software, we propose a new method which contains the MDA's advantage, automation of implement process, and can solve the problem of real-time overhead. First, we define 'generic APIs' which do not depend on any RTOS's but provide most of typical RTOS services. We can describe RTOS-related behaviors of target application using these generic APIs in a CIC(Common Intermediate Code). Then, we propose a transformation tool for translating a CIC using generic APIs into a C-code for specific RTOS. The proposed API translator converts them into C-code using XML transformation rule which is defined outside. It indicates that an API translator extends to other RTOS's by modifying or adding the transformation rule. From the experiment, we validate the proposed method.

• Korean Journal of Optics and Photonics
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• v.8 no.5
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• pp.426-430
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• 1997

A signal processor is implemented to verify the possibility of a closed-loop signal processing for the open-loop fiber-optic gyroscope (FOG). As an all-digital implementation of phase tracking scheme, it does analog-to digital conversion of the detector output and signal processing all-digitally thereafter for a noise-immune FOG signal processor. It has a potential of 36-bits resolution in the $2\pi$ range which is best in the number and sets no limit in the magnitude of the phase shift. The new signal processor was tested on an all-fiber gyroscope and turned out to have a resolution of $3\mu$rad(corresponds to 0.74 deg/hr), which is good enough to measure the Earth's rotation rate.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.12 no.7
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• pp.1180-1186
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• 2008

The LNB phase noise of user terminal for high data rate satellite transmission was analyzed in this paper. The phase noise severely affects the service performance in low data rate transmission as well as multi-mode signal for high data rate. As the satellite link frequency is increased, the effects of phase noise for multi-mode signal is increased. The phase noise of LNB, which is operated in high frequency band, is about equal to the transmission system phase noise and have an major effects on service performance degradation. The available transmission mode was analyzed in presence of phase noise of LNB and analysis method for LNB phase noise spectrum distribution was proposed in multi-mode signal.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.23 no.5
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• pp.1349-1359
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• 1998

In this paper, presented is the result of a digital implementation of a FM stereo composite signal generator. The chip utilizing DDFS(Direct Digital Frequency Synthesizer architecture is implemented using $1.0\mu\textrm{m}$ CMOS gate-array technology thereby replacing analog componentry. To verify the process of generating composite signals a conventional logic simulation method was used. The processed chip was mounted on an evaluation PCB to test and analyze to signals. According to the measurement result obtained by using a 12-bit DAC, the digital FM composite signal generator produces a 74DB spectrally pure signal over its entire tuning range, which is superior to that of analog counterpart by 14dB in it spectral reponse. And further enhancements of the spectral response is expected to be achieved by using a high resolution digital to analog converter, such as a 16-bit DAC. The resulting signals is superior to the signal of the analoy circuitry typically used, in major characteristics such as S/N ratios, accuracy, tuning stability, and signal seperation.