• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.23 no.3
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• pp.410-413
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• 2012

This study describes the performance comparison to solve angle ambiguity needed to angle of arrival estimation in 2D radiometer. There are three algorithms to solve its ambiguity such as phase-comparison monopulse method, digital beam-forming method and least square error of the phase difference in 2D radar interferometer. To estimate two direction angles, phase-comparison monopulse method is sequentially applied to azimuth and elevation direction. To analyze the performance of these methods, probability of solving angle ambiguity and execution time have been chosen as performance indexes. Through the Monte Carlo simulation, we have verified that phase-comparison monopulse method is most effective in real-time signal processing application.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.7A
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• pp.668-675
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• 2002

This paper proposes pre-distorter combined LUT with 2ιpartition interpolation method to reduce nonlinear distortion which was caused by high PAPR and to update LUT quickly. Pre-distorted gain and phase can be found by using LUT which consisted of AM/AM and AM/PM value, and OFDM signal amplitude. The proposed 2ιpartition interpolation can accurately find predistorted gain and phase using bit shift and add component instead of increasing size of LUT which requires increasing the amount of computation. The performance of the proposed method was measured by the difference between HPA input and output characteristics by the LUT size, constellation, SER performance by the HPA, and LUT update error by the HPA characteristic changes. As a result, it is shown that when the size of the LUT is 32 and 64 for 16-QAM and 64-QAM, nonlinear distortion nearly didn't occurred.

• The Bulletin of The Korean Astronomical Society
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• v.35 no.1
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• pp.45.1-45.1
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• 2010

한국천문연구원과 일본 국립천문대는 공동으로 한일공동VLBI상관기(Korea-Japan VLBI Correlator, KJJVC)를 개발하였다. 이 상관기는 최대 16 관측국에 대하여 16 세트의 자기상관 및 120 세트의 상호상관을 계산할 수 있다. 각 관측국당 최대 8,192 Mbits/sec의 입력 데이터를 처리할 수 있으며, 8,192개의 주파수채널을 갖는 상관 스펙트럼을 약 25.4 밀리초~수초의 적분 시간으로 출력할 수 있는데, 최대 상관 출력 속도는 1.4GB/sec이다. 한편, 이 상관기는 한국우주전파관측망(KVN) 뿐만 아니라 동아시아VLBI관측망 및 우주공간VLBI관측망의 관측 데이터도 처리할 수 있도록 설계 제작되었으며, 최대 지연 추적 범위는 ${\pm}35,000km$이며, 보상 가능한 최대 기선 속도는 7.5km/sec이다. 현재 다른 VLBI관측망에서 사용하고 있는 타 상관기의 경우 지연은 2차 미분까지 보상하고, 프린지 위상은 3 단계로 보상하고 있는 것에 비하여, 한일공동VLBI상관기에서는 지연은 3차 미분까지 보상하여 지연 잔차를 최소화하고 프린지 위상은 16 단계로 세분하여 보상 수준의 정밀도를 최대화하였다. 이러한 지연 보상 및 프린지 멈춤 알고리즘을 상세히 소개하고 그 특성 및 장점을 보고한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.4C
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• pp.371-376
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• 2010

In this paper, we propose a new fast carrier recovery algorithm for high-order QAM systems. The proposed algorithm detects carrier frequency offset from the phase differences among the received symbols directly and combines it with the conventional carrier recovery, so that it is possible to achieve the carrier recovery with wide tracking range and fast acquisition time. Simulation results show that the proposed carrier recovery method reduces acquisition time at large frequency offset and low signal-to-noise ratio (SNR).

• Proceedings of the Earthquake Engineering Society of Korea Conference
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• 2003.09a
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• pp.352-359
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• 2003

철도나 고속철도 교량에 사용되는 장대레일은 차량에 의한 동적충격의 완화, 주행시 승차감의 향상과 같은 장점을 가져온 반면에, 인접한 교량의 연결부에서 레일과 교량 상부구조간의 거동 불일치로 인해 레일에 부가적인 응력을 발생시킨다. 이러한 부가적인 레일응력과 지반운동의 특성에 따른 구조적 응답의 민감도 및 열차의 안전한 정지를 고려하여, 지진 발생시 고속철도교량의 장대레일 응력을 해석하기 위해 레일의 재료비선형성, 지반운동의 위상차 등을 고려한 비선형 시간이력해석 방법을 제시하였다. 그리고 우리나라의 여러 지반조건을 고려하고 고속철도의 대표적인 연속교량 모델에 적용하여 제시한 방법의 타당성을 검토하였다.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.4
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• pp.442-450
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• 2008

In this paper, the phase diverisity in a direct-conversion receiver for a UHF RFID reader is analyzed and the optimal I/Q signal combining methods is presented with respect to tag modulation. At first, fading characteristics of a single channel receiver is shown to prove the importance of phase diversity due to the phase relationship between the backscattered signal and the local oscillator. And the optimal signal combining methods are presented in order to overcome the signal power reduction due to phase diversity. In case of ASK, the power combining method is presented for the optimal I/Q combining. And the arctangent and principal component combining methods using covariance matrix of I and Q channels are presented for the optimal I/Q combining in case of PSK. In order to analyze the performance of suggested methods, the selection diversity and the optimal combining methods are compared. According to analysis and simulation results, the optimal combining methods have a maximum 3 dB SNR enhancement than selection diversity.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.1
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• pp.74-84
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• 2007

This paper presents a new dual-loop Delay Locked Loop(DLL) to expand the delay lock range of a conventional DLL. The proposed dual-loop DLL contains a Coarse_loop and a Fine_loop, and its operation utilizes one of the loops selected by comparing the initial time-difference among the reference clock and 2 internal clocks. The 2 internal clock signals are taken, respectively, at the midpoint and endpoint of a VCDL and thus are $180^{\circ}$ separated in phase. When the proposed DLL is out of the conventional lock range, the Coarse_loop is selected to push the DLL in the conventional lock range and then the Fine_loop is used to complete the locking process. Therefore, the proposed DLL is always stably locked in unless it is harmonically false-locked. Since the VCDL employed in the proposed DLL needs two control voltages to adjust the delay time, it uses TG-based inverters, instead of conventional, multi-stacked, current-starved inverters, to compose the delay line. The new VCDL provides a wider delay range than a conventional VCDL In overall, the proposed DLL demonstrates a more than 2 times wider lock range than a conventional DLL. The proposed DLL circuits have been designed, simulated and proved using 0.18um, 1.8V TSMC CMOS library and its operation frequency range is 100MHz${\sim}$1GHz. Finally, the maximum phase error of the DLL locked in at 1GHz is less than 11.2ps showing a high resolution and the simulated power consumption is 11.5mW.

• Journal of the Korean Institute of Intelligent Systems
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• v.12 no.6
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• pp.524-530
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• 2002

This note suggests a stepwise fuzzy moving sliding surface using Sugeno-type fuzzy system and presents a sliding mode control scheme using it. The fuzzy system has the angle of state error vector and the distance from the origin in the phase plane as inputs and a first-order linear differential equation as output. The surface initially passes arbitrary initial states and subsequently moves towards a predetermined surface via rotating or shifting. This method reduces the reaching and tracking time and improves robustness. Conceptually the slope of the Proposed fuzzy moving sliding surface increases stepwise in the stable region of the phase plane. The surface, however, rotates continuously because the surface is a fuzzy system. The asymptotic stability of the fuzzy sliding surface is proved. The validity of the proposed control scheme is shown in computer simulation for a second-order nonlinear system.

• Journal of IKEEE
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• v.16 no.3
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• pp.189-196
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• 2012

This paper proposes new phase error compensation method of RVDT encoder in the FFT domain. Phase errors are measured with a small combination of compensation resistors and the changes of first order coefficients of FFT for each resistor are obtained. It is found that the coefficient change is inversely proportional to the inserted resistor. The proposed method takes less time and the size of the table is smaller than previous time domain approaches. In addition, the location of the compensation resistor can be found through axis transformation of the coefficients. Finally, the peak-to-peak phase error was improved to 0.57 which is two times better than previous one.

• Proceedings of the KIEE Conference
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• 2015.07a
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• pp.187-188
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• 2015

본 논문은 시간영역에서 대칭좌표법을 사용한 전력품질 이벤트 검출에 관한 연구이다. sag, swell. interruption, harmonic, flicker, transients, notches, spike 등과 같은 전력품질 이벤트들이 이 방법으로 쉽게 검출된다. 본 방법은 웨이블릿, s-변환, 힐버트 변환 등의 방법이 가지고 있는 계산 부담이 없기 때문에 온라인 응용프로그램에 쉽게 사용될 수 있다. 단상 전력품질 이벤트 신호는 시간 영역에서 대칭요소를 계산하기 위하여 120도, 240도 위상차를 가지고 생성되는 다른 두 신호와 함께 이동되어 간다. 전력품질 이벤트 신호의 시작점(triggering point)은 역상분으로부터 쉽게 검출될 수 있고 이벤트는 정상분과 역상분의 합을 사용한 파형의 특징 분석으로 쉽게 분류될 수 있다. 시뮬레이션된 결과는 전력품질 이벤트의 검출과 분류를 위한 본 방법의 효과를 보여주기 위하여 다수의 전력품질 이벤트를 보여주고 있고 전력계통망 지락사고 시뮬레이션을 수행하여 유용성을 확인하였다.