• Title/Summary/Keyword: 스위칭 레귤레이터

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Low-area Dual mode DC-DC Buck Converter with IC Protection Circuit (IC 보호회로를 갖는 저면적 Dual mode DC-DC Buck Converter)

  • Lee, Joo-Young
    • Journal of IKEEE
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    • v.18 no.4
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    • pp.586-592
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    • 2014
  • In this paper, high efficiency power management IC(PMIC) with DT-CMOS(Dynamic threshold voltage Complementary MOSFET) switching device is presented. PMIC is controlled PWM control method in order to have high power efficiency at high current level. The DT-CMOS switch with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuit consist of a saw-tooth generator, a band-gap reference(BGR) circuit, an error amplifier, comparator circuit, compensation circuit, and control block. The saw-tooth generator is made to have 1.2MHz oscillation frequency and full range of output swing from supply voltage(3.3V) to ground. The comparator is designed with two stage OP amplifier. And the error amplifier has 70dB DC gain and $64^{\circ}$ phase margin. DC-DC converter, based on current mode PWM control circuits and low on-resistance switching device, achieved the high efficiency nearly 96% at 100mA output current. And Buck converter is designed along LDO in standby mode which fewer than 1mA for high efficiency. Also, this paper proposes two protection circuit in order to ensure the reliability.

Power Design of an S-Band Transmitter for KSLV-II with Derating (디레이팅을 고려한 한국형발사체 S-밴드 송신기 전원부 설계)

  • Kim, Seokkwon;Kim, Sung-Wan;Hong, Seung Hyun;Kim, Hyo Jong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.30 no.5
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    • pp.339-347
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    • 2019
  • The power circuit design of an on-board S-band transmitter for KSLV-II with derating(operation of a component at less than its maximum rated specification to enhance reliability) is investigated. The power circuit of the transmitter consists of linear voltage regulators, DC/DC converters for regulating the DC supply, and diodes for reverse voltage protection. After analyzing the load current of the components, derating requirements are explored. Furthermore, power dissipation and junction temperature rise are considered with respect to the load current. The analysis is compared to the results from an engineering model of the transmitter. The temperature of the components is derated by >$40^{\circ}C$ in an environment where the ambient temperature is $+60^{\circ}C$, which is the acceptance test specification of high temperature.