• Title/Summary/Keyword: 설계알고리즘

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Development of Decision Support System for the Design of Steel Frame Structure (강 프레임 구조물 설계를 위한 의사 결정 지원 시스템의 개발)

  • Choi, Byoung Han
    • Journal of Korean Society of Steel Construction
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    • v.19 no.1
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    • pp.29-41
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    • 2007
  • Structural design, like other complex decision problems, involves many trade-offs among competing criteria. Although mathematical programming models are becoming increasingly realistic, they often have design limitations, that is, there are often relevant issues that cannot be easily captured. From the understanding of these limitations, a decision-support system is developed that can generate some useful alternatives as well as a single optimum value in the optimization of steel frame structures. The alternatives produced using this system are "good" with respect to modeled objectives, and yet are "different," and are often better, with respect to interesting objectives not present in the model. In this study, we created a decision-support system for designing the most cost-effective moment-resisting steel frame structures for resisting lateral loads without compromising overall stability. The proposed approach considers the cost of steel products and the cost of connections within the design process. This system makes use of an optimization formulation, which was modified to generate alternatives of optimum value, which is the result of the trade-off between the number of moment connections and total cost. This trade-off was achieved by reducing the number of moment connections and rearranging them, using the combination of analysis based on the LRFD code and optimization scheme based on genetic algorithms. To evaluate the usefulness of this system, the alternatives were examined with respect to various design aspects.

A Minimal Resource High-Level Synthesis Algorithm for Low Power Design Automation (저 전력 설계 자동화를 위한 최소 자원 상위 레벨 합성 알고리즘)

  • Lin, Chi-Ho
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.7 no.3
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    • pp.95-99
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    • 2008
  • This paper proposes a new minimal resource high-level synthesis algorithm for low power design automation. The proposed algorithm executes an efficient approach to minimize the power consumption of the functional units in a circuit during the high level synthesis. In this paper, we visit all control steps one by one to reduce the switching activity in CDFG. The register sharing algorithm determines the minimum register after the life time analysis of all variable. According to property of input signal for functional unit, the proposed method visits all control step one by one and determines the resource allocation with minimal power consumption at each control step in a greedy fashion. The effect of the proposed algorithm has been proved through various filter benchmark to adopt a new scheduling and allocation algorithm considering the low rover.

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The Design of Distributed Control Algorithm for Mobile Communication Network in the Battle Field (전투지역에서의 이동통신을 위한 분산제어 알고리즘 설계)

  • 이경현;송주석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.16 no.11
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    • pp.1167-1178
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    • 1991
  • In this paper, we review the characteristics of battle field, consider required properties of mobile radio network, and design network control architecture proper to battle field network. Also we design distributed algorithm which constructs network control architecture and transmission schedule. For the information of network connectivity and the immediate reconfiguration caused by failure, loss, or movement of nodes, configuration and transmission schedule, algorithms are to be executed periodically and for entire network reliability, algorithms must to be executed fully distributedly. At the time of loss or failure of primary local control node, we suggest the method which diminishes transmission delay. We explain the operation of network with examples. Finally designed algorithms are verified and analized by computer simulation.

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Design of Modified MDS Block for Performance Improvement of Twofish Cryptographic Algorithm (Twofish 암호알고리즘의 성능향상을 위한개선 된 MDS 블록 설계)

  • Jeong Woo-Yeol;Lee Seon-Heun
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.5 s.37
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    • pp.109-114
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    • 2005
  • Twofish cryptographic algorithm is concise algorithm itself than Rijndael cryptographic algorithm as AES, and easy of implementation is good, but the processing speed has slow shortcoming. Therefore this paper designed improved MDS block to improve Twofish cryptographic algorithm's speed. Problem of speed decline by a bottle-neck Phenomenon of the Processing speed existed as block that existing MDS block occupies Twofish cryptosystem's critical path. To reduce multiplication that is used by operator in MDS block this Paper removed a bottle-neck phenomenon and low-speed about MDS itself using LUT operation and modulo-2 operation. Twofish cryptosystem including modified MDS block designed by these result confirmed that bring elevation of the processing speed about 10$\%$ than existing Twofish cryptosystem.

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Web Log Scenario Make for Forensic (포렌식을 위한 웹로그 시나리오 작성 시스템)

  • Jang, Hae-Sook;Lee, Jin-Kwan;Lee, Jong-Chan;Park, Sang-Joon;Park, Ki-Hong
    • Proceedings of the Korean Society of Computer Information Conference
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    • 2011.01a
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    • pp.303-305
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    • 2011
  • 수많은 웹로그 히스토리의 자료에서 컴퓨터 사이버범죄에 대한 증거자료로 채택되기 위한 기술적인 웹 포렌식 자료의 추출에 사용되는 웹 포렌식 알고리즘은 필수적인 요소이다. 본 논문에서는 웹 로그 시나리오 작성을 제안하고 설계하여, 웹 포렌식을 통한 컴퓨터 사이버범죄에 대한 학문적 기술적 발전에 기여하고자 하는데 본 논문의 목적이 있다. 수많은 웹로그 자료에서 컴퓨터 사이버 범죄에 대한 증거 자료로 채택되기 위한 기술적인 웹 포렌식 자료의 추출에 사용되는 웹 로그 분석 알고리즘은 필수적인 요소이다. 본 논문에서는 웹 포렌식 알고리즘을 제안하고 설계하여, 실제 기업의 웹 서버 시스템에 제안한 알고리즘을 구현해 본다. 웹 서버에서 웹 로그 분석을 위해 사용한 웹 포렌식 알고리즘과 플로우를 설계하고 코딩을 통한 구현을 한다. 구현 결과 웹 포렌식을 통한 컴퓨터 사이버 범죄에 대한 학문적 기술적 발전에 기여하고자 하는데 본 논문의 목적이 있다.

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An Implementation of a Feature Extraction Hardware Accelerator based on Memory Usage Improvement SURF Algorithm (메모리 사용률을 개선한 SURF 알고리즘 특징점 추출기의 하드웨어 가속기 설계)

  • Jung, Chang-min;Kwak, Jae-chang;Lee, Kwang-yeob
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2013.10a
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    • pp.77-80
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    • 2013
  • SURF algorithm is an algorithm to extract feature points and to generate descriptors from input images. It is robust to change of environment such as scale, rotation, illumination and view points. Because of these features, it is used for many image processing applications such as object recognition, constructing panorama pictures and 3D image restoration. But there is disadvantage for real time operation because many recognition algorithms such as SURF algorithm requires a lot of calculations. In this paper, we propose a design of feature extractor and descriptor generator based on SURF for high memory efficiency. The proposed design reduced a memory access and memory usage to operate in real time.

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VHDL Design of High Performance FIR Filter for Digital Protection Relay Using Least Square Algorithm (최소자승 알고리즘을 이용한 디지털 보호 계전기용 고성능 FIR 필터의 VHDL 모델 설계)

  • Shin, Jae-Shin;Kim, Jong-Tae;Park, Jong-Kang;Seo, Jong-Wan;Shin, Myung-Cheol
    • Proceedings of the KIEE Conference
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    • 2003.07a
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    • pp.345-347
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    • 2003
  • 본 논문에서는 디지털 보호 계전기에 쓰이는 필터 중에서 최소 자승 알고리즘을 이용한 고성능 FIR 필터를 설계하였다. 기존의 DFT필터와 MATLAB 시뮬레이션을 이용하여 비교하였으며 FIR 필터의 VHDL모델 및 합성에 중점을 두었다. FIR 필터는 기본적으로 유한개의 임펄스 응답이 이루어지기 때문에 기타 다른 필터에 비하여 안정도가 높으며 선형적인 위상을 가지기 때문에 차단 주파수 대역의 왜곡현상을 없앨 수 있는 장점을 가지고 있다. 여러 가지 알고리즘으로 구현한 FIR 필터를 시뮬레이션 한 결과 최소 자승 알고리즘이 가장 우수한 결과를 나타내었다. 기본적으로 디지털 보호 계전기에서 디지털 필터의 기능은 사고 전압, 전류로부터 60Hz의 기본파 추출 CT, PT 왜곡 및 DC offset을 제거하는데 있다. 본 논문에서는 이러한 기능을 가지면서 샘플링 주파수와 차수를 같게 하여 FIR 필터와 DFT 필터의 주파수 응답과 연 산 속도를 비교 하였다. 본 논문에서 설계된 최소 자승 알고리즘을 이용한 FIR 필터는 같은 조건의 DFT필터에 비해 1고조파와 2고조파의 차이가 10db 이상 더 우수 하였으며 연산 속도 또한 2배 이상 좋은 결과를 보였다.

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Design and Implementation of 3DES crypto-algorithm with Pipeline Architecture (파이프라인 구조의 3DES 암호알고리즘의 설계 및 구현)

  • Lee Wan-Bok;Kim Jung-Tae
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.10 no.2
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    • pp.333-337
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    • 2006
  • Symmetric block ciper algorithm consists of a chains of operations such as permutation and substitution. There exists four kinds of operation mode, CBC, ECB, CFB, and OFB depending on the operation paradigm. Since the final ciper text is obtained through the many rounds of operations, it consumes much time. This paper proposes a pipelined design methodology which can improve the speed of crypto operations in ECB mode. Because the operations of the many rounds are concatenated in serial and executed concurrently, the overall computation time can be reduced significantly. The experimental result shows that the method can speed up the performance more than ten times.

Design of MUSIC Algorithm for DOA estimation (도래방향 추정을 위한 MUSIC 알고리즘의 설계)

  • Park, Byung-Woo;Jeong, Bong-Sik
    • Journal of the Institute of Convergence Signal Processing
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    • v.7 no.4
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    • pp.189-194
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    • 2006
  • In this paper, design of MUSIC algorithm, which is one of high resolution DOA (direction of arrival) estimation techniques was studied. Generally the complex-valued correlation matrix of MUSIC algorithm is transformed to unitary matrix or matrix expansion for the real hardware implementation. Using the orthogonality between the noise subspace eigenvectors and the steering vectors corresponding to signal component, we estimate DOA with the real-valued computation between steering vectors and noise subspace eigenvectors. The DOA algorithm was designed with VHDL models with considerations of 2 elements and 1 incident wave and its simulation results are derived.

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A Metric based Restructuring Technique Preserving the Behavior of Object-Oriented Designs (객체지향 설계 행위를 보존하는 메트릭 기반 재구조화 기법)

  • 이병정
    • Journal of KIISE:Software and Applications
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    • v.30 no.10
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    • pp.912-924
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    • 2003
  • Design restructuring improves software quality by reorganizing design elements and reduces maintenance cost. Object-oriented metrics can help to detect design flaws and find transformations to reorganize design elements. Basically, the transformations must preserve the behavior of an initial system. This paper describes a metric based restructuring technique preserving the behavior of object-oriented designs, founded on set theory, and gives its validity by applying the technique to applications written in Java. This paper also compares the technique with a technique using simulated annealing algorithm to show its effectiveness.