• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.6C
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• pp.632-639
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• 2002

To reduce the area and power consumption in constant coefficient multiplications, the constant coefficient can be encoded using canonic signed digit(CSD) representation. When the partial product terms are added depending on the nonzero bit(1 or -1) positions in the CSD-encoded multiplier, all sign bits are properly extended before the addition takes place. In this paper, to reduce the overhead due to sign extension, a new method is proposed based on the fact that carry propagation in the sign extension part can be controlled such that a desired input bit can be propagated as a carry. Also, a fixed-width multiplier design method suitable for CSD multiplication is proposed. As an application, 43-tap filbert transformer for SSB/BPSK-DS/CDMA is implemented. It is shown that, about 16∼28% adders can be saved by the proposed method compared with the conventional methods.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.8
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• pp.1805-1811
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• 2005

We analyzed of the receiver which received OOK and the FSK transmission signal that were a general digital transmission technique in a WDM system. We expressed various error probability with the m which was bandwidth and a bit numerical function and carried out performance evaluation of a receiver in a performance evaluation way. When error probability was $10^{-4}$ which is m=10, as for the receive sensitivity of OOK, the $1.7{\times}10^2$, FSK got $2.2{\times}10^2$ through simulation. And the receive sensitivity of OOK and FSK was able to get each $2.15{\times}10^2$ and $3.07{\times}10^2$ when it was error probability of $10^{-9}$ which is m = 25. Transmission of 23Gb/S showed that it was possible when we does the $10^{-9}$ that was basis error probability of a light communication system with a basis through this, and a coding profit was with for and transmission capacity of 75Gb/s confirmed that it was possible if a code rate was with 0.8.

• Journal of the Institute of Convergence Signal Processing
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• v.5 no.2
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• pp.159-164
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• 2004

This paper proposes a new digital filter implementation which adopts an identical structure at both behavioral and logic level in top-down design. This methodology is based on the observation that multiplication is a form of convolution and carrying, and therefore multiplication is implemented with the same structure as that of a convolution in a recursive manner at the logic level. In order to demonstrate a recursive structure-based FIR digital filter, we select L-tap transposed and systolic FIR filters, and implement them to have a single structure. The proposed filter design becomes regular and modular because of the recursive adoption of a single structure for convolutions, and is very compact in that it needs only two 1-bit I/O ports in addition to significant improvement on hardware complexity without time penalty on the output sequence.

• Journal of KIISE:Databases
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• v.31 no.6
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• pp.650-663
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• 2004

In molecular biology, DNA sequence searching is one of the most crucial operations. Since DNA databases contain a huge volume of sequences, a fast indexing mechanism is essential for efficient processing of DNA sequence searches. In this paper, we first identify the problems of the suffix tree in aspects of the storage overhead, search performance, and integration with DBMSs. Then, we propose a new index structure that solves those problems. The proposed index consists of two parts: the primary part represents the trie as bit strings without any pointers, and the secondary part helps fast accesses of the leaf nodes of the trio that need to be accessed for post processing. We also suggest an efficient algorithm based on that index for DNA sequence searching. To verify the superiority of the proposed approach, we conducted a performance evaluation via a series of experiments. The results revealed that the proposed approach, which requires smaller storage space, achieves 13 to 29 times performance improvement over the suffix tree.

• Journal of KIISE:Databases
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• v.37 no.3
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• pp.137-145
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• 2010

Wireless sensors play important roles in various areas as ubiquitous computing is generalized. Depending on applications properties, each sensor can be equipped with limited computing power in addition to general function of gathering environment-related information. One of main issues in this environment is to improve energy-efficiency in sensor nodes. In this paper, we devise a new attribute-query processing algorithm. Each sensor has to maintain partial information locally about attributes values gathered at its all descendent nodes. As the volume is higher, however, the maintenance cost also increases. And the update cost also has to be considered in the proposed algorithm. Thus, some bits, AVB(Attribute-Value Bits), are delivered instead of the value itself, where each bit represents a bound of attribute. Thus, the partial information can decrease the number of exchanged messages with a little cost during query processing. Through simulation works, the proposed algorithm is analyzed from several points of view.

• KIPS Transactions on Computer and Communication Systems
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• v.4 no.12
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• pp.391-398
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• 2015

This paper devises a performance improvement and evaluation process of circuit minimization algorithms for mentorship education of distinguished informatics gifted secondary students. In the process, students learn that there are several alternative equivalent circuits for a target function and recognize the necessity for formalized circuit minimization methods. Firstly, they come at the concept of circuit minimization principle from Karnaugh Map which is a manual methodology. Secondly, they explore Quine-McCluskey algorithm which is a computational methodology. Quine-McCluskey algorithm's time complexity is high because it uses set operations. To improve the performance of Quine-McCluskey algorithm, we encourage them to adopt a bit-wise data structure instead of integer array for sets. They will eventually see that the performance achievement is about 36%. The ultimate goal of the process is to enlarge gifted students' interest and integrated knowledge about computer science encompassing electronic switches, logic gates, logic circuits, programming languages, data structures and algorithms.

• KSCI Review
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• v.2 no.1
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• pp.55-67
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• 1995

Recently, it is possible to high speed transmission of the non-voiced data, including voice, data, moving image instead of voice only in the past by changing the communication method to digital form from analog owing to the development of semiconductor and computer technology which for information transmission of the remote point. By doing so, we can get the improvement of the noise effect and low cost but the loss of transmission bandwidth. It is necessary to take some method in oreder to reducing the fading which is propotional to transmission bandwidth during the transmission of radio communication channel, especially. When we design the digital communication system, we must considered to the fading effect in order to determination of the transmitting power, modulation /demodulation method, transmission speed, bit error rate. This paper mainly concerns to the method to the channel simulator which descrives the fading effect during the transmission by computer model and digital filter modeling of the radio fading channel by unsing the transmitting and received signal. By taking the inverse of the characteristic of the modeled filter, it is possible to improvement of the communication system by reducing the distortion and inter-symbol interference which occurs in the channel.

• Journal of Broadcast Engineering
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• v.24 no.4
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• pp.660-669
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• 2019

Recently, with the development of three-dimensional scanning devices and multi-dimensional array cameras, research is continuously conducted on techniques for handling three-dimensional data in application fields such as AR (Augmented Reality) / VR (Virtual Reality) and autonomous traveling. In particular, in the AR / VR field, content that expresses 3D video as point data has appeared, but this requires a larger amount of data than conventional 2D images. Therefore, in order to serve 3D point cloud content to users, various technological developments such as highly efficient encoding / decoding and storage, transfer, etc. are required. In this paper, V-PCC bit stream created using V-PCC encoder proposed in MPEG-I (MPEG-Immersive) V-PCC (Video based Point Cloud Compression) group, It is defined by the MPEG-DASH (Dynamic Adaptive Streaming over HTTP) standard, and provides to be composed of segments. Also, in order to provide the user with the information of the 3D coordinate system, the depth information parameter of the signaling message is additionally defined. Then, we design a verification platform to verify the technology proposed in this paper, and confirm it in terms of the algorithm of the proposed technology.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.14 no.1
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• pp.113-119
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• 2004

Exponentiation is widely used in practical applications related with cryptography, and as the discrete log is easily solved in case of a low exponent n, a large exponent n is needed for a more secure system. However. since the time complexity for exponentiation algorithm increases in proportion to the n figure, the development of an exponentiation algorithm that can quickly process the results is becoming a crucial problem. In this paper, we propose a parallel exponentiation algorithm which can reduce the number of rounds with a fixed number of processors, where the field elements are in GF($2^m$), and also analyzed the round bound of the proposed algorithm. The proposed method uses window method which divides the exponent in a particular bit length and make idle processors in window value computation phase to multiply some terms of windows where the values are already computed. By this way. the proposed method has improved round bound.

• Journal of Broadcast Engineering
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• v.26 no.6
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• pp.778-789
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• 2021

Recently, various lightweight methods for using Convolutional Neural Network(CNN) models in mobile devices have emerged. Weight quantization, which lowers bit precision of weights, is a lightweight method that enables a model to be used through integer calculation in a mobile environment where GPU acceleration is unable. Weight quantization has already been used in various models as a lightweight method to reduce computational complexity and model size with a small loss of accuracy. Considering the size of memory and computing speed as well as the storage size of the device and the limited network environment, this paper proposes a method of compressing integer weights after quantization using a video codec as a method. To verify the performance of the proposed method, experiments were conducted on VGG16, Resnet50, and Resnet18 models trained with ImageNet and Places365 datasets. As a result, loss of accuracy less than 2% and high compression efficiency were achieved in various models. In addition, as a result of comparison with similar compression methods, it was verified that the compression efficiency was more than doubled.