• Title/Summary/Keyword: 비이진 터보부호

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A study on efficient integration model of satellite and underwater communication for improving throughput efficiency (전송효율 향상을 위한 위성 및 수중 통신의 효율적인 융합 모델 연구)

  • Baek, Chang-Uk;Jung, Ji-Won
    • Journal of Advanced Marine Engineering and Technology
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    • v.40 no.6
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    • pp.535-541
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    • 2016
  • In this paper, we analyzed efficient decoding scheme with FTN(Faster than Nyquist) method that is transmission method faster than Nyquist theory and increase the throughput. Applying the FTN method to satellite and underwater communication, we proposed an efficient transceiver model. To minimize ISI(Inter-Symbol Interference) induced by FTN signal, turbo equalization algorithms that iteratively exchange probabilistic information between Viterbi equalizer based on BCJR algorithm and LDPC decoder are used in satellite communication. In others, for underwater communication, DFE equalizer and LDPC decoder are concatenated to improve performance.

A Cooperative Hybrid ARQ Scheme with Adaptive Retransmission (적응 재전송을 적용한 협력 하이브리드 ARQ 기법)

  • Kang, Seong-Kyo;Wang, Jin-Soo;Kim, Yun-Hee;Song, Iick-Ho
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.34 no.3A
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    • pp.213-220
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    • 2009
  • Cooperative diversity is a promising technique for range extension and diversity increase without the use of multiple transmit antennas at the user equipment. In this paper, we propose a cooperative hybrid automatic repeat request relay method with adaptive retransmission to increase the throughput when the SNR of a source user is low. In the proposed method, the source user transmits the first segment of a codeword to relay users and a base station. If the base station fails to recover the information from the received packet, it requests the source or some relay users to retransmit the packet previously sent. In addition, the retransmission type of a selected user is chosen from repetition or incremental redundancy according to the quality of systematic bits in a turbo codeword. Simulation results show that the proposed method improves the throughput compared to conventional methods, and the improvement is significant when the source user has a low SNR.

High Speed Turbo Product Code Decoding Algorithm (고속 Turbo Product 부호 복호 알고리즘 및 구현에 관한 연구)

  • Choi Duk-Gun;Lee In-Ki;Jung Ji-Won
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.6C
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    • pp.442-449
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    • 2005
  • In this paper, we introduce three kinds of simplified high-speed decoding algorithms for turbo product decoder. First, A parallel decoder structure, the row and column decoders operate in parallel, is proposed. Second, HAD(Hard Decision Aided) algorithm is used for early-stopping algorithm. Lastly, P-Parallel TPC decoder is a parallel decoding scheme, processing P rows and P columns in parallel instead of decoding one by one as that in the original scheme.

Low Power Turbo Decoder Design Techniques Using Two Stopping Criteria (이중 정지 기준을 사용한 저 전력 터보 디코더 설계 기술)

  • 임호영;강원경;신현철;김경호
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.9
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    • pp.39-48
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    • 2004
  • Turbo codes, whose performance in bit error rate is close to the Shannon limit, have been adopted as a part of standard for the third-generation high-speed wireless data services. Iterative Turbo decoding results in decoding delay and high power consumption. As wireless communication systems can only use limited power supply, low power design techniques are essential for mobile device implementation. This paper proposes new effective criteria for stopping the iteration process in turbo decoding to reduce power consumption. By setting two stopping criteria, decodable threshold and undecodable threshold, we can effectively reduce the number of decoding iterations with only negligible error-correcting performance degradation. Simulation results show that the number of unsuccessful error-correction can be reduced by 89% and the number of decoding iterations can be reduced by 29% on the average among 12500 simulations when compared with those of an existing typical method.

Performance of Double Binary Turbo Code for Power Line Communicaion Systems (고속 전력선통신 시스템의 비이진 터보 부호 성능)

  • Lee, Jae-Sun;Yang, Jae-Su;Woo, Sang-Kyu;Yoon, Byung-Wan;Kim, Jin-Young
    • 한국정보통신설비학회:학술대회논문집
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    • 2009.08a
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    • pp.72-77
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    • 2009
  • In this paper, performance of a turbo-coded PLC system is analyzed and simulated in a power line communication channel. Since the power line communication system typically operates in a hostile environment, turbo code has been employed to enhance reliability of transmitted data. The performance is evaluated in terms of bit error probability. As turbo decoding algorithms, Max-Log-MAP algorithms are chosen and performances are compared. The results in this paper can be applied to OFDM-based high-speed power line communication systems

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Performance Analysis of Turbo Product Code Using Parallel Structure (병렬 구조를 이용한 Turbo Product Code 성능 분석)

  • 이태길;정지원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.2C
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    • pp.181-186
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    • 2004
  • Recently, there has been intensive focus on Turbo Product Codes(TPCs) which have low decoding complexity and achieve near-optimum performances at high code-rate. This paper present a parallel algorithm of turbo product codes enable simultaneous decoding of row and column. The row and column decoders operate in parallel and update each other after row and column has been decoded. simulation results show that the performance of proposed parallel turbo code is almost the same as that conventional scheme for several turbo product codes.

Performance analysis of adaptive turbo coded modulation over mobile communication channel (이동통신 채널에서 적응터보부호화 변조방식의 성능분석)

  • Kim, Yeon-Su;Lee, Sang-Hoon;Joo, Eon-Kyeong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.10 s.352
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    • pp.69-78
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    • 2006
  • High spectral efficiency can be obtained by adaptive modulation in which the modulation scheme is changed according to the channel environment. Thus it is especially suitable to mobile channel which is a typical example of time-varying channel. It is required to determine the optimum thresholds of signal-to-noise ratio(SNR) to change the modulation scheme effectively according to mobile speeds. Thus the optimum thresholds for specific mobile speeds to get the required bit error rate(BER) of $10^{-6}$ are obtained with the powerful turbo code in this paper. In addition, the optimum thresholds for the continuous mobile speed are proposed by interpolation of the obtained results. And the error performance and average spectral efficiency are investigated at various mobile speeds and channel environments.

A study of next generation OpenCable systems for Ultra-High Definition television broadcasting (초 고화질 텔레비전 방송을 위한 차세대 오픈 케이블 방식에 대한 연구)

  • Cho, Chang-Yeon;Heo, Jun;Kim, Joon-Tae
    • Journal of Broadcast Engineering
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    • v.14 no.2
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    • pp.228-237
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    • 2009
  • This paper examines the potential of Ultra-High Definition TV (UD-TV) broadcasting transmission systems beyond HD-TV over cable channel. Firstly, we analyze the trend of TOV(Threshold of Visibility) by extending the OpenCable (J.83 Annex B) system 256QAM which is the standard of Korean and American cable television transmission to 1024QAM, and realize that the OpenCable 1024QAM has nearly 30% higher data rate than 256QAM at the expense of impractically higher TOV (Threshold of Visibility). To achieve practical TOV, we control code rates of inner convolutional coder and replace turbo coder in forward error correction (FEC) part, thereby analyzing the best performance of the OpenCable systems having conventional FEC. In that result, it is necessary to modify conventional FEC of the OpenCable system to achieve under 31.5dB TOV. Moreover we study the potential of UD-TV transmission via two or more TV channels, so called channel bonding, through the Shannon capacity in 6MHz channel and the relationship with next generation A/V codec technologies.

Adaptive Trellis-Coded 8PSK Using Symbol Transformation (심볼 변환을 이용한 적응형 8PSK 트렐리스 부호화 방식)

  • 정지원
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.29 no.4C
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    • pp.448-453
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    • 2004
  • Conventional pragmatic TCMs need sector phase quantizer to apply Viterbi decoder which uses 3-bit soft decision. A symbol transformation applied to the incoming I-channel and Q-channel symbols allows to use Viterbi decoder without sector phase quantizer. We analyzed structure and performance of proposed decoder, and applied it to the turbo decoder. We know that the performance of proposed decoder is better than that of conventional decoder by 1 [㏈]because of increasing of Euclidean distance.

A High Speed Block Turbo Code Decoding Algorithm and Hardware Architecture Design (고속 블록 터보 코드 복호 알고리즘 및 하드웨어 구조 설계)

  • 유경철;신형식;정윤호;김근회;김재석
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.41 no.7
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    • pp.97-103
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    • 2004
  • In this paper, we propose a high speed block turbo code decoding algorithm and an efficient hardware architecture. The multimedia wireless data communication systems need channel codes which have the high-performance error correcting capabilities. Block turbo codes support variable code rates and packet sizes, and show a high performance due to a soft decision iteration decoding of turbo codes. However, block turbo codes have a long decoding time because of the iteration decoding and a complicated extrinsic information operation. The proposed algorithm using the threshold that represents a channel information reduces the long decoding time. After the threshold is decided by a simulation result, the proposed algorithm eliminates the calculation for the bits which have a good channel information and assigns a high reliability value to the bits. The threshold is decided by the absolute mean and the standard deviation of a LLR(Log Likelihood Ratio) in consideration that the LLR distribution is a gaussian one. Also, the proposed algorithm assigns '1', the highest reliable value, to those bits. The hardware design result using verilog HDL reduces a decoding time about 30% in comparison with conventional algorithm, and includes about 20K logic gate and 32Kbit memory sizes.