• 한국전자파학회논문지
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• 제28권6호
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• pp.501-504
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• 2017

본 논문에서는 광대역 버틀러 매트릭스와 위상 천이기를 이용한 하이브리드 빔포밍 안테나 시스템을 제안하고, 이를 설계 및 측정하였다. 기존 $4{\times}4$ 버틀러 매트릭스는 4개의 빔패턴과 낮은 이득 때문에, $8{\times}8$ 버틀러 매트릭스를 사용하게 된다. 이 때 복잡한 구조로 인해 적층 및 양면 패턴으로 설계하게 되며, 이는 비아홀 및 Cross-over 구조에 의한 손실로 성능이 열화되게 된다. 이러한 단점을 극복하고자 제안된 하이브리드 빔포밍 안테나 시스템의 경우, 비아홀 손실로 인한 성능 열화를 최소화하기 위해 단면 패턴으로 구조를 단순화하였다. 또한, 두 개의 위상 천이기를 추가함으로써, 다양한 빔패턴을 제공할 수 있도록 설계하였다. 제안한 안테나 시스템을 이용하여, 16개의 입력조합으로 ${\pm}45^{\circ}$의 빔조향 각도에서 10 dBi 이상의 방사이득을 얻을 수 있었다.

• 한국전자통신학회논문지
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• 제14권3호
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• pp.489-496
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• 2019

본 논문에서는 주파수 2.4 GHz에서 동작하는 초소형 이중 교차 다이폴 안테나를 설계 및 제작하였다. 모바일 기기에 적용할 수 있도록 안테나의 크기를 소형화하기 위해 교차 다이폴을 상부 2개 층에 배치하고 하부에 반사평면과 수평형 정합회로 및 그라운드 평면을 각 층에 배치한 구조에서 안테나와 급전부 및 정합회로는 수직 방향 관통비아홀로 연결하였다. 제작된 안테나의 크기는 $21.61mm{\times}16.88mm{\times}1.27mm$이며, 측정된 반사계수는 -31.5 dB이고, -10 dB 이하 대역폭은 112 MHz 이다. 또한 안테나의 이득은 -4 dBi로 무지향성의 방사 특성을 가지므로 모바일 기기용 안테나로 다양한 분야에 확대 적용될 수 있을 것으로 판단된다.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2003년도 추계학술대회논문집
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• pp.101-106
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• 2003

Recent electronic equipment becomes smaller, more functional, and more complex. According to these trends, LTCC(low temperature co-fired ceramic) has been emerged as a promising technology in packaging industry. It consists of multi-layer ceramic sheet, and the circuit has 3D structure. In this technology via hole formation plays an important role because it provides an electric path for the packaging interconnection network. Therefore via hole quality is very important for ensuring performance of LTCC product. Via holes are formed on the green sheet that consists of ceramic(before sintering) layer and PET(polyethylene Terephthalate) one. In this paper we found the correlation between hole quality and process condition such as ceramic thickness, and tool size. The shear behavior of double layer sheet by micro hole punching which is different from that of single layer one was also discussed.

• 소성∙가공
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• 제14권3호
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• pp.277-281
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• 2005

LTCC(Low temperature co-fired ceramic) is being recognized as a significant packaging material of electrical devices for the advantages such as relatively low temperature being needed for process, low conductor resistance and high printing resolution. In the process of LTCC electrical devices, the punched via-hole quality is one of the most important factors on the performance of the device. However, its mechanism is very complicated and optimization of the process seems difficult. In this paper, to clarify the process, via-hole punching experiments were carried out and the punched holes were examined in terms of their burr formation. The effects of thickness of PET sheet, ceramic sheet and punch-to- die clearance on via-hole quality were also discussed. Optimum process conditions are proposed and a factor $\kappa$ is introduced to express effect of the process variables.

• 소성∙가공
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• 제13권1호
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• pp.65-71
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• 2004

Recent electronic equipment becomes smaller, more functional, and more complex. According to these trends, LTCC(low temperature co-fired ceramic) has been emerged as a promising technology in packaging industry. It consists of multi-layer ceramic sheet, and the circuit has 3D structure. In this technology via hole formation plays an important role because it provides an electric path for the packaging interconnection network. Therefore via hole qualify is very important for ensuring performance of LTCC product. Via holes are formed on the green sheet that consists of ceramic(before sintering) layer and PET(polyethylene terephthalate) one. In this paper we found the correlation between hole quality and process condition such as PET thickness and ceramic thickness. The shear behavior of double layer sheet by micro hole punching which is different from that of single layer one was also discussed.

• Journal of Welding and Joining
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• 제32권3호
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• pp.19-26
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• 2014

Through Silicon Via (TSV) technology is the shortest interconnection technology which is compared with conventional wire bonding interconnection technology. Recently, this technology has been also noticed for the miniaturization of electronic devices, multi-functional and high performance. The short interconnection length of TSV achieve can implement a high density and power efficiency. Among the TSV technology, TSV filling process is important technology because the cost of TSV technology is depended on the filling process time and reliability. Various filling methods have been developed like as Cu electroplating method, molten solder insert method and Ti/W deposition method. In this paper, various TSV filling methods were introduced and each filling materials were discussed.

• 기계와재료
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• 제22권1호
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• pp.22-29
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• 2010

최근 휴대폰 등 모방일 전자기기 산업에서 차세대 고부가 PCB(MLB, HDI, FPC, 등) 및 고기능 PCB(COF, MOF, SOF)의 급속한 적용 확대로 직경$20{\mu}m$급의 비아홀(viahole) 및 interconnection 홀 가공을 위한 초정밀/초고속 레이저 드릴링 공정 및 장비기술 개발에 대한 시장의 요구가 급증하고 있다. 이에 반해 기존의 CO2 레이저 드릴링은 기술적 한계에 도달하여 시장의 요구에 대응이 불가하며, 선진업체에서는 최근 UV 레이저 드릴링 장비에 대한 시장 점유율을 높여가고 있다. 특히 국내시장은 미국의 ESI사가 독점하고 있어 기술개발 투자를 통한 국산화가 절실한 상황이다. 이에 당사에서는 초고속/초정밀 UV laser 시스템을 이용한 FPC iva hole drilling을 연구과제로 개발을 진행하고 있으며 국산화를 넘어서 세계시장점유를 목표로 공정장비개발을 진행중이다.

• 마이크로전자및패키징학회지
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• 제13권1호통권38호
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• pp.43-49
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• 2006

새로운 잔류 기공 추출 공정을 적용하여 Blind via hole(BVH)의 형상에 따라 발생되는 잔류기공 특성, 거동 및 신뢰성평가를 수행하였다. 잔류 기공 추출 공정을 적용한 시편에서는 잔류기공이 완전히 제거 되었으며, 기존 공정으로 제조된 시편에 비하여 40% 수준의 향상된 결과를 나타내었다. BVH의 형상에 관계없이 1.5기압수준으로 약 30초 이상 동안 추출하면 BVH내부의 잔류기공은 제거 되어지며 JEDEC 기준의 신뢰성으로 평가한 결과 BVH내부에 잔류기공은 존재하지 않았다.

• 한국정밀공학회지
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• 제27권10호
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• pp.14-22
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• 2010

The most costly and time-consuming process in the fabrication of today's multi-layer circuit board is drilling interconnection holes between adjacent layers and via holes within a layer. Decreasing size of via holes being demanded and growing number of via holes per panel increase drilling costs. Component density and electronic functionality of today's multi-layer circuit boards can be improved with the introduction of cost-effective, variable depth laser drilled blind micro via holes, and interconnection holes. Laser technology is being quickly adopted into the circuit board industry but can be accelerated with the introduction of a true production laser drilling system. In order to get optimized condition for drilling to FPCB (Flexible Printed Circuit Board), we use various drill pattern as drill step. For productivity, we investigate drill path optimization method. And for the precise drilling the thermal drift of scanner and temperature change of scan system are tested.

• 한국소성가공학회:학술대회논문집
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• 한국소성가공학회 2004년도 제3회 금형가공 심포지엄
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• pp.260-265
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• 2004

LTCC(Low temperature co-fired ceramic) is being recognized as a significant packaging material of electrical devices for the advantages such as relatively low temperature being needed for process, low conductor resistance and high printing resolution. In the process of LTCC electrical devices, the punched via-hole quality is one of the most important factors on the performance of the device. However, its mechanism is very complicated and optimization of the process seems difficult. In this paper, to clarify the process, via-hole punching experiments were carried out and the punched holes were examined in terms of their burr formation. The effects of thickness of PET sheet and ceramic sheet and punch-to-die clearance on via-hole quality were also discussed. Optimum process conditions are proposed and a factor k is introduced to express effect of the process variables.