• Title/Summary/Keyword: 블록 패턴

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Silicon Substrate Coupling Modeling, Analysis, and Substrate Parameter Extraction Method for RF Circuit Design (RF 회로 설계를 위한 실리콘 기판 커플링 모델링, 해석 및 기판 파라미터 추출)

  • Jin, Woo-Jin;Eo, Yung-Seon;Shim, Jong-In
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.38 no.12
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    • pp.49-57
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    • 2001
  • In this paper, equivalent circuit model and novel model parameter extraction method of a silicon(Si) substrate are presented. Substrate coupling through Si-substrate is quantitatively investigated by analyzing equivalent circuit with operating frequency and characteristic frequencies (i.e., pole and zero frequency) of a system. For the experimental verification of the equivalent circuit and parameter extraction method, test patterns are designed and fabricated in standard CMOS technology with various isolation distances, substrate resistivity, and guard-ring structures. Then, these are measured in l00MHz-20GHz frequency range by using vector network analyzer. It is shown that the equivalent-circuit-based HSPICE simulation results using extracted parameters have excellent agreement with the experimental results. Thus, the proposed equivalent circuit and parameter extraction methodology can be usefully employed in mixed-signal circuit design and verification of a circuit performance.

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An Equalizing for CCI Canceling in MLC NAND Flash Memory (MLC NAND 플래시 메모리의 CCI 감소를 위한 등화기 설계)

  • Lee, Kwan-Hee;Lee, Sang-Jin;Kim, Doo-Hwan;Cho, Kyoung-Rok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.10
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    • pp.46-53
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    • 2011
  • This paper presents an equalizer reducing CCI(cell-to-cell interference) in MLC NAND flash memory. The CCI is a critical factor which affects occurring data errors in a cell, when surrounding cells are programed. We derived a characteristic equation for CCI considering write procedure of data that is similar with signal equalizing. The model considers the floating gate capacitance coupling effect, the direct field effect, and programming methods of the MLC NAND flash memory. We verify the proposed equalizer comparing with the measured data of 1-block MLC NAND flash memory. As the simulation result, the equalizer shows an error correction ratio about 60% under 20nm NAND process.

Image Denoising Using Nonlocal Similarity and 3D Filtering (비지역적 유사성 및 3차원 필터링 기반 영상 잡음제거)

  • Kim, Seehyun
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.21 no.10
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    • pp.1886-1891
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    • 2017
  • Denoising which is one of major research topics in the image processing deals with recovering the noisy images. Natural images are well known not only for their local but also nonlocal similarity. Patterns of unique edges and texture which are crucial for understanding the image are repeated over the nonlocal region. In this paper, a nonlocal similarity based denoising algorithm is proposed. First for every blocks of the noisy image, nonlocal similar blocks are gathered to construct a overcomplete data set which are inherently sparse in the transform domain due to the characteristics of the images. Then, the sparse transform coefficients are filtered to suppress the non-sparse additive noise. Finally, the image is recovered by aggregating the overcomplete estimates of each pixel. Performance experiments with several images show that the proposed algorithm outperforms the conventional methods in removing the additive Gaussian noise effectively while preserving the image details.

Hybrid Super-Resolution Algorithm Robust to Cut-Change (컷 전환에 적응적인 혼합형 초고해상도 기법)

  • Kwon, Soon-Chan;Lim, Jong-Myeong;Yoo, Jisang
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.17 no.7
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    • pp.1672-1686
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    • 2013
  • In this paper, we propose a hybrid super-resolution algorithm robust to cut-change. Existing single-frame based super-resolution algorithms are usually fast, but quantity of information for interpolation is limited. Although the existing multi-frame based super-resolution algorithms generally robust to this problem, the performance of algorithm strongly depends on motions of input video. Furthemore at boundary of cut, applying of the algorithm is limited. In the proposed method, we detect a define boundary of cut using cut-detection algorithm. Then we adaptively apply a single-frame based super-resolution method to detected cut. Additionally, we propose algorithms of normalizing motion vector and analyzing pattern of edge to solve various problems of existing super-resolution algorithms. The experimental results show that the proposed algorithm has better performance than other conventional interpolation methods.

Behavior of Soil-reinforced Retaining Walls in Tiered Arrangement (계단식 보강토 옹벽의 거동 특성)

  • Yoo, Choong-Sik;Kim, Joo-Suk
    • Journal of the Korean Geotechnical Society
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    • v.18 no.3
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    • pp.61-72
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    • 2002
  • This paper presents the results of investigation on the behavior of soil-reinforced segmental retaining walls in tiered arrangement using the finite element method of analysis. 2D finite element analyses were performed on tiered walls with two levels of offset distance. Cases with equivalent surcharge as suggested by the NCMA design guideline were additionally analyzed in an attempt to confirm the appropriateness of the equivalent surcharge model adopted by NCMA. Deformation characteristics of a tiered wall with small offset distance suggest a compound mode of failure and support current design approaches requiring a global slope stability analysis for design. Also revealed is that the interaction between the upper and lower walls significantly affects not only the performance of the lower wall but also the upper wall, suggesting that the upper walls should also be designed with due consideration of the interaction.

An algorithm of the natural view transition in the panoramic image based navigation using Fast Fourier Transform Techniques (파노라마 영상 기반 네비게이션에서 FFT 기술을 이용한 자연스러운 장면 전환 알고리즘)

  • Kim, Dae-Hyun;Choi, Jong-Soo;Kim, Tae-Eun
    • The KIPS Transactions:PartB
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    • v.10B no.5
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    • pp.561-566
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    • 2003
  • This paper proposes a new algorithm that generates smooth and realistic transition views from one viewpoint to another view point on the panorama based navigation system. The proposed algorithm is composed with two steps. One is prewarping that aligns the viewing direction in two panorama image, the other is bidirectional disparity morphing (BDM) that generates the intermediate scene from the aligned panorama images. For the prewarping, first of all, we compute the phase correlation between two images in order to get the information such as the displacement, rotation, and scale. Then we align the original images using these information. As soon as finishing the prewarping, we compute the block based disparity vectors (DVs) and smooth them using the two occluding patterns. As we apply these DVs to the BDM, we can get the elaborate intermediate scenes. We make an experiment on the proposed algorithm with real panoramic images and we can get the satisfactory results.

Disparity estimation using wavelet transformation and reference points (웨이블릿 변환과 기준점을 이용한 변위 추정)

  • 노윤향;고병철;변혜란;유지상
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.2A
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    • pp.137-145
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    • 2002
  • In the method of 3D modeling, stereo matching method which obtains three dimensional depth information from the two images is taken from the different view points. In general, it is very essential work for the 3D modeling from 2D stereo images to estimate the exact disparity through fading the conjugate pair of pixel from the left and right image. In this paper to solve the problems of the stereo image disparity estimation, we introduce a novel approach method to improve the exactness and efficiency of the disparity. In the first place, we perform a wavelet transformation of the stereo images and set the reference points in the image by the feature-based matching method. This reference points have very high probability over 95 %. In the base of these reference points we can decide the size of the variable block searching windows for estimating dense disparity of area based method and perform the ordering constraint to prevent mismatching. By doing this, we could estimate the disparity in a short time and solve the occlusion caused by applying the fried-sized windows and probable error caused by repeating patterns.

An Adaptive ROI Mask Generation for ROI coding of JPEG2000 (JPEG200의 관심영역 부호화를 위한 적응적인 관심영역 마스크 생성 방법)

  • Kang, Ki-Jun;Seo, Yeong-Geon
    • Journal of the Korea Society of Computer and Information
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    • v.12 no.5
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    • pp.39-47
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    • 2007
  • In this thesis, a method of generating an adaptable Region-Of-Interest(ROI) Mask for the Region-Of-Interest coding is suggested. In the method, an ROI Mask is generated using the information of the ROI designated by a user. In the existed method of ROI coding, after scanning all the pixels in order and discriminating an ROI, an ROI Mask is generated. But, in our method, after scanning a part of pixels based on the shape pattern of an ROI and discriminating a ROI by one code block unit, an ROI Mask is generated. Moreover, from the method, a pattern number, threshold of a ROI and background threshold parameter are provided. According to the result of its comparing test with the existed methods to show the usability, it is proved that our method is superior in speed to the existed ones.

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Development of Performance Analysis Tool for Flash Disk on Windows Platform (윈도우즈 기반 플래시 디스크의 성능 분석을 위한 도구 개발)

  • Park Sung-Hwan;Yoo Hyun-Seok;Kim Do Yun;Park Won-Joo;Oh Kisun;Lee Sang-Won;Park Sangwon
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.07a
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    • pp.826-828
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    • 2005
  • 이동 기기의 저장 장치로 플래시 메모리가 널리 사용되고 있으며 고정 하드 디스크를 대체하는 저장 매제로 부상하고 있다. 그러므로 플래시 메모리의 특성을 잘 이해하고, 최대한 효율적으로 플래시 메모리를 사용할 필요성이 있다. 이러한 역할을 해주는 것은 플래시 내부의 시스템 소프트웨어인 FTL(Fiash Translation Layer)이다. FTL은 운영체제가 디스크에 전달하는 블록을 물리적인 플래시 메모리에 맵핑하는 역할을 한다. 그러므로 플래시 메모리의 성능은 FTL 알고리즘이 결정한다. 플래시를 대체한 플래시 디스크에서는 기존의 파일 시스템이 탑재되며 간단한 섹터 기반외 이동형 기기에서와는 다른 특성을 가진다. FTL 성능을 평가하기 위해서는 실제적으로 플래시 메모리가 장착된 제품들이 동작하는 시스템에서 실험을 해야 한다. 많은 플래시 디스크는 윈도우즈에서 동작하므로 윈도우즈의 디스크 I/O를 추출하여 실험을 해야만 한다. 본 논문에서는 윈도우즈에서 물리적인 디스크 I/O 패턴을 추출하여 FTL 알고리즘의 성능을 평가하기 위한 도구 개발에 대하여 설명하고 이에 대한 간단한 결과를 보인다.

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Low-area FFT Processor Structure using Common Sub-expression Sharing (Common Sub-expression Sharing을 사용한 저면적 FFT 프로세서 구조)

  • Jang, Young-Beom;Lee, Dong-Hoon
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.4
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    • pp.1867-1875
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    • 2011
  • In this paper, a low-area 256-point FFT structure is proposed. For low-area implementation CSD(Canonic Signed Digit) multiplier method is chosen. Because multiplication type should be less for efficient CSD multiplier application to the FFT structure, the Radix-$4^2$ algorithm is chosen for those purposes. After, in the proposed structure, the number of multiplication type is minimized in each multiplication block, the CSD multipliers are applied for implementation of multiplication. Furthermore, in CSD multiplier implementation, cell-area is more reduced through common sub-expression sharing(CSS). The Verilog-HDL coding result shows 29.9% cell area reduction in the complex multiplication part and 12.54% cell area reduction in overall 256-point FFT structure comparison with those of the conventional structure.