• Title/Summary/Keyword: 블록 적응 양자화

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DC Offset Adjusted Inter Prediction Algorithm for Improving H.264/AVC Video Coding Efficiency (H.264/AVC 동영상 압축율 향상을 위한 DC 오프셋 보정에 기반한 인터 예측 알고리즘)

  • Yoon, Dae-Il;Kim, Hae-Kwang
    • Journal of Broadcast Engineering
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    • v.16 no.5
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    • pp.793-796
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    • 2011
  • H.264/AVC compresses video data by applying DCT transform, quantization and entropy coding processes to the residual signal obtained by inter/intra prediction. This paper proposes a method enhancing an existing DC offset adjustment technology which uses information of neighboring blocks to reduce residual information for improving coding efficiency. DC offset information is not sent over bitstreams, but calculated in the same way both in the decoder and in the encoder. Experimental results show that the proposed method enhances coding efficiency by 0.25% in average BD-Rate compared to H.264/AVC and gives better or worse coding efficiency compared to the existing DC offset method depending on video sequences with coding efficiency degradation by 0.09% in average BD-Rate. This experimental results also show that further coding efficiency improvement is possible by applying the proposed method adaptively to slice or macroblock coding units.

Efficient Rate Control by Lagrange Multiplier Using Adaptive Mode Selection in Video Coding (비디오 코팅시 Lagrage 승수를 조정하여 적응 모드 선택에 따른 비트율의 제어)

  • Ryu, Chul;Kim, Seung P.
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.25 no.1B
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    • pp.77-88
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    • 2000
  • This paper presents an approach for rate control by adaptively selecting macroblock modes in video coding.The problem of rate control has been investigated by many authors where quantizer level is adjustedbased on the buffer fullness. The proposed approach is different fron the previous ones [4] id that it finds the optimal decision curve rather than finding a set of the modes. Proposed algorithm extends the coding decision options for rate control to motion/no-motion compensation as well as inter/intra decisions. Instead of having a fixed motion/no-notion compensation or inter/intra decision curve, one can utilize an adaptive decision curvebased on the characteristics of input frames so that the PSNR at a given bit rate is maximized. Therefore, the proposed approach provides better rate control than simple quantizer feedback approach interns of visual quality. The curve is obtained by utilizing simulated annealing optimization technique. Thealgorithm is implemented and simulations are compared with other approaches within H.261 video codec.

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Digital Cage Watermarking using Human Visual System and Discrete Cosine Transform (인지 시각시스템 및 이산코사인변환을 이용한 디지털 이미지 워터마킹)

  • 변성철;김종남;안병하
    • Journal of KIISE:Information Networking
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    • v.30 no.1
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    • pp.17-23
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    • 2003
  • In this Paper. we Propose a digital watermarking scheme for digital images based on a perceptual model, the frequency masking, texture making, and luminance masking Properties of the human visual system(HVS), which have been developed in the context of image compression. We embed two types of watermark, one is pseudo random(PN) sequences, the other is a logo image. To embed the watermarks, original images are decomposed into $8\times8$ blocks, and the discrete cosine transform(DCT) is carried out for each block. Watermarks are casted in the low frequency components of DCT coefficients. The perceptual model adjusts adaptively scaling factors embedding watermarks according to the local image properties. Experimental results show that the proposed scheme presents better results than that of non-perceptual watermarking methods for image qualify without loss of robustness.

An Adaptive Information Hiding Technique of JPEG2000-based Image using Chaotic System (카오스 시스템을 이용한 JPEG2000-기반 영상의 적응적 정보 은닉 기술)

  • 김수민;서영호;김동욱
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.41 no.4
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    • pp.9-21
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    • 2004
  • In this paper, we proposed the image hiding method which decreases calculation amount by encrypt partial data using discrete wavelet transform and linear scale quantization which were adopted as the main technique for frequency transform in JPEG2000 standard. Also we used the chaotic system which has smaller calculation amount than other encryption algorithms and then dramatically decreased calculation amount. This method operates encryption process between quantization and entropy coding for preserving compression ratio of images and uses the subband selection method and the random changing method using the chaotic system. For ciphering the quantization index we use a novel image encryption algerian of cyclically shifted in the right or left direction and encrypts two quantization assignment method (Top-down/Reflection code), made change of data less. Also, suggested encryption method to JPEG2000 progressive transmission. The experiments have been performed with the proposed methods implemented in software for about 500 images. consequently, we are sure that the proposed are efficient image encryption methods to acquire the high encryption effect with small amount of encryption. It has been shown that there exits a relation of trade-off between the execution time and the effect of the encryption. It means that the proposed methods can be selectively used according to the application areas. Also, because the proposed methods are performed in the application layer, they are expected to be a good solution for the end-to-end security problem, which is appearing as one of the important problems in the networks with both wired and wireless sections.

Bit Assignment for Wyner-Ziv Video Coding (Wyner-Ziv 비디오 부호화를 위한 비트배정)

  • Park, Jong-Bin;Jeon, Byeung-Woo
    • Journal of the Institute of Electronics Engineers of Korea SP
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    • v.47 no.1
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    • pp.128-138
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    • 2010
  • In this paper, we propose a new bit assignment scheme for Wyner-Ziv video coding. Distributed video coding (DVC) is a new video coding paradigm which enables greatly low complexity encoding because it does not have any motion prediction module at encoder. Therefore, it is very well suited for many applications such as video communication, video surveillance, extremely low power consumption video coding, and other portable applications. Theoretically, the Wyner-Ziv video coding is proved to achieve the same rate-distortion (RD) performance comparable to that of the joint video coding. However, its RD performance has much gap compared to MC-DCT-based video coding such as H.264/AVC. Moreover, Transform Domain Wyner-Ziv (TDWZ) video coding which is a kind of DVC with transform module has difficulty of exact bit assignment because the entire image is treated as a same message. In this paper, we propose a feasible bit assignment algorithm using adaptive quantization matrix selection for the TDWZ video coding. The proposed method can calculate suitable bit amount for each region using the local characteristics of image. Simulation results show that the proposed method can enhance coding performance.

Hardware Design of In-loop Filter for High Performance HEVC Encoder (고성능 HEVC 부호기를 위한 루프 내 필터 하드웨어 설계)

  • Park, Seungyong;Im, Junseong;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.335-342
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    • 2016
  • This paper proposes efficient hardware structure of in-loop filter for a high-performance HEVC (High Efficiency Video Coding) encoder. HEVC uses in-loop filter consisting of deblocking filter and SAO (Sample Adaptive Offset) to improve the picture quality in a reconstructed image due to a quantization error. However, in-loop filter causes an increase in complexity due to the additional encoder and decoder operations. A proposed in-loop filter is implemented as a three-stage pipeline to perform the deblocking filtering and SAO operation with a reduced number of cycles. The proposed deblocking filter is also implemented as a six-stage pipeline to improve efficiency and performs a new filtering order for efficient memory architecture. The proposed SAO processes six pixels parallelly at a time to reduce execution cycles. The proposed in-loop filter encoder architecture is designed by Verilog HDL, and implemented by 131K logic gates in TSMC $0.13{\mu}m$ process. At 164MHz, the proposed in-loop filter encoder can support 4K Ultra HD video encoding at 60fps in real time.

A Low-Complexity Image Compression Method Which Reduces Memories Used in Multimedia Processor Implementation (멀티미디어 프로세서 구현에 사용되는 메모리를 줄이기 위한 저 복잡도의 영상 압축 알고리즘)

  • Jung Su-Woon;Kim I-Rang;Lee Dong-Ho
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.41 no.1
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    • pp.9-18
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    • 2004
  • This paper presents an efficient image compression method for memory reduction in multimedia processor which can be simply implemented in hardware and provides high performance. The multimedia processor, which includes processing of high-resolution images and videos, requires large memories: they are external frame memories to store frames and internal line memories for implementing some linear filters. If we can reduce those memories by adopting a simple compression method in multimedia processor, it will strengthen its cost competitiveness. There exist many standards for efficiently compressing images and videos. However, those standards are too complex for our purpose and most of them are 2-D block-based methods, which do not support raster scanned input and output. In this paper, we propose a low-complexity compression method which has good performance, can be implemented with simple hardware logic, and supports raster scan. We have adopted 1${\times}$8 Hadamard transform for simple implementation in hardware and compression efficiency. After analyzing the coefficients, we applied an adaptive thresholding and quantization. We provide some simulation results to analyze its performance and compare with the existing methods. We also provide its hardware implementation results and discuss about cost reduction effects when applied in implementing a multimedia processor.