• Journal of Educational Research in Mathematics
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• v.19 no.3
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• pp.425-441
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• 2009

The cube-accumulation is a new theme included in the 7th elementary mathematics curriculum for improving children's spatial ability. One activity of the cube-accumulation is to recognize the configuration of accumulated cube given three plane figures in the directions of the above, the front and the side, respectively. The approach to this activity presented in the mathematics textbook is more or less intuitive and constructive, and difficult to some children. So we suggest an alternative, more analytic method, 'elimination method', that is eliminating unnecessary parts from $n{\times}n{\times}n$ whole cubes. This method was adopted to the 32 sixth graders, in special five applicants among them. Their responses and activities were analyzed. We confirm that we can teach the cube-accumulation by the elimination method, and some children prefer this method. 13u1 this method requires more exercises to be executed skillfully.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.15-22
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• 2004

This paper presents the channel analysis considering power distribution network(PDN) system of PCB. For achieve the target PDN system we proposed the useful design approach for acquiring the characteristic target of power distribution network in overall frequency ranges. The proposed method is based on the hierarchical approach related to frequency ranges and the path-based equivalent circuit model to consider the interference of the current paths between the decoupling capacitors and the board through it is a lumped model for fast and easy calculation, experimental results show that the proposed model is almost as precise as the numerical analysis. The analysis of PDN system shows that although the effective inductance of package dominatly affects the power noise and the signal transfer through data channel, the board PDNs also can not be neglected for achieving the accurate channel signaling. Therefore, we must design concurrently the chip, package, and board from the initial spec design of high speed digital system.