• Title/Summary/Keyword: 분산/병렬 처리

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A Study on Rainfall Prediction by Neural Network (神經網理論에 의한 降雨豫測에 관한 硏究)

  • 오남선;선우중호
    • Water for future
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    • v.29 no.4
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    • pp.109-118
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    • 1996
  • The neural network is a mathematical model of theorized brain activity which attempts to exploit the parallel local processing and distributed storage properties. The neural metwork is a good model to be applied for the classification problem, large combinatorial optimization and nonlinear mapping. A multi-layer neural network is constructed to predict rainfall. The network learns continuourvalued input and output data. Application of neural network to 1-hour real data in Seoul metropolitan area and the Soyang River basin shows slightly good predictions. Therefore, when good data is available, the neural network is expected to predict the complicated rainfall successfully.

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Video On Demand Server develop Study with UNIX (UNIX이용한 VOD서버 개발 연구)

  • 황두순;김재업
    • Proceedings of the KAIS Fall Conference
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    • 2001.11a
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    • pp.215-219
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    • 2001
  • VOD는 사용자가 원하는 Video등의 멀티미디어 데이터들을 선택적으로 제 받을 수 있는 서비스이다. VOD는 여러 가지 응용분야의 요구사항을 만족하기에는 기술적으로 해결하여야 할 문제점이 여러 가지 존재한다. 그래서 본 논문에서는 클러스터링 시스템 구조에서 멀티미디어 데이터의 실시간 디스플레이를 보장하는 병렬/분산 입출력 시스템에 대한 연구를 제시하여 Linux 운영체제를 사용하는 컴퓨터를 단위 노드로 하여 테스트베드 시스템을 구성한다. 이 환경에서 멀티미디어 데이터를 각 I/O노드에 디클러스터링하여 비디오 설시간성과 멀티미디어 데이터의 대역폭 요구를 만족하기 위한 방법을 연구 개발하고 특정 응용 프로그램에 연구개발하고 특정응용 프로그램에 연구 개발된 방법을 적용하여 제시된 방법의 우수성과 클러스터링 환경에서 멀티미디어 데이터처리에 장점을 이 논문에서 입증하고자 한다.

A Dual Slotted Ring Organization for Reducing Memory Access Latency in Distributed Shared Memory System (분산 공유 메모리 시스템에서 메모리 접근지연을 줄이기 위한 이중 슬롯링 구조)

  • Min, Jun-Sik;Chang, Tae-Mu
    • The KIPS Transactions:PartA
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    • v.8A no.4
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    • pp.419-428
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    • 2001
  • Advances in circuit and integration technology are continuously boosting the speed of processors. One of the main challenges presented by such developments is the effective use of powerful processors in shared memory multiprocessor system. We believe that the interconnection problem is not solved even for small scale shared memory multiprocessor, since the speed of shared buses is unlikely to keep up with the bandwidth requirements of new powerful processors. In the past few years, point-to-point unidirectional connection have emerged as a very promising interconnection technology. The single slotted ring is the simplest form point-to-point interconnection. The main limitation of the single slotted ring architecture is that latency of access increase linearly with the number of the processors in the ring. Because of this, we proposed the dual slotted ring as an alternative to single slotted ring for cache-based multiprocessor system. In this paper, we analyze the proposed dual slotted ring architecture using new snooping protocol and enforce simulation to compare it with single slotted ring.

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Development of Network Based MT Data Processing System (네트워크에 기반한 MT자료의 처리기술 개발 연구)

  • Lee Heuisoon;Kwon Byung-Doo;Chung Hojoon;Oh Seokhoon
    • Geophysics and Geophysical Exploration
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    • v.3 no.2
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    • pp.53-60
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    • 2000
  • The server/client systems using the web protocol and distribution computing environment by network was applied to the MT data processing based on the Java technology. Using this network based system, users can get consistent and stable results because the system has standard analysing methods and has been tested from many users through the internet. Users can check the MT data processing at any time and get results during exploration to reduce the exploration time and money. The pure/enterprised Java technology provides facilities to develop the network based MT data processing system. Web based socket communication and RMI technology are tested respectively to produce the effective and practical client application. Intrinsically, the interpretation of MT data performing the inversion and data process requires heavy computational ability. Therefore we adopt the MPI parallel processing technique to fit the desire of in situ users and expect the effectiveness for the control and upgrade of programing codes.

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Realization of the Pulse Doppler Radar Signal Processor with an Expandable Feature using the Multi-DSP Based Morocco-2 Board (다중 DSP 구조의 Morocco-2 보드를 이용한 확장성을 갖는 펄스 도플러 레이다 신호처리기 구현)

  • 조명제;임중수
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.7
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    • pp.1147-1156
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    • 2001
  • In this paper, a new design architecture of radar signal processor in real time is proposed. It has been designed and implemented under the consideration to minimize the inter-processor communication overhead and to maintain the coherence in Doppler pulse domain and in range domain. Its structure can be easily reconfigured and reprogrammed in accordance with an addition of function algorithm or a modification of operational scenario. As we designed a task configuration for parallel processing from measures of computation time for function algorithms and transmission time for results by signal processing, data exchange between processors for performing of function algorithms could be fully removed. Morocco-2 board equipped ADSP-21060 processor of Analog Devices inc. and APEX-3.2 developed for SHARC DSP were used to construct the radar signal processor.

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The T-tree index recovery for distributed main-memory database systems in ATM switching systems (ATM 교환기용 분산 주기억장치 상주 데이터베이스 시스템에서의 T-tree 색인 구조의 회복 기법)

  • 이승선;조완섭;윤용익
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.22 no.9
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    • pp.1867-1879
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    • 1997
  • DREAM-S is a distributed main-memory database system for the real-time processing of shared operational datra in ATM switching systems. DREAM-S has a client-server architecture in which only the server has the diskstorage, and provides the T-Tree index structure for efficient accesses to the data. We propose a recovery technique for the T-Tree index structre in DREAM-S. Although main-memory database system offer efficient access performance, the database int he main-memory may be broken when system failure such as database transaction failure or power failure occurs. Therfore, a recovery technique that recovers the database (including index structures) is essential for fault tolerant ATM switching systems. Proposed recovery technique relieves the bottleneck of the server processors disk operations by maintaining the T-Tree index structure only in the main-memory. In addition, fast recovery is guaranteed even in large number of client systems since the T-Tree index structure(s) in each system can be recovered cncurrently.

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FAST Design for Large-Scale Satellite Image Processing (대용량 위성영상 처리를 위한 FAST 시스템 설계)

  • Lee, Youngrim;Park, Wanyong;Park, Hyunchun;Shin, Daesik
    • Journal of the Korea Institute of Military Science and Technology
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    • v.25 no.4
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    • pp.372-380
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    • 2022
  • This study proposes a distributed parallel processing system, called the Fast Analysis System for remote sensing daTa(FAST), for large-scale satellite image processing and analysis. FAST is a system that designs jobs in vertices and sequences, and distributes and processes them simultaneously. FAST manages data based on the Hadoop Distributed File System, controls entire jobs based on Apache Spark, and performs tasks in parallel in multiple slave nodes based on a docker container design. FAST enables the high-performance processing of progressively accumulated large-volume satellite images. Because the unit task is performed based on Docker, it is possible to reuse existing source codes for designing and implementing unit tasks. Additionally, the system is robust against software/hardware faults. To prove the capability of the proposed system, we performed an experiment to generate the original satellite images as ortho-images, which is a pre-processing step for all image analyses. In the experiment, when FAST was configured with eight slave nodes, it was found that the processing of a satellite image took less than 30 sec. Through these results, we proved the suitability and practical applicability of the FAST design.

Design of the Digital Neuron Processor (디지털 뉴런프로세서의 설계에 관한 연구)

  • Hong, Bong-Wha;Lee, Ho-Sun;Park, Wha-Se
    • 전자공학회논문지 IE
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    • v.44 no.3
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    • pp.12-22
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    • 2007
  • In this paper, we designed of the high speed digital neuron processor in order to digital neural networks. we designed of the MAC(Multiplier and Accumulator) operation unit used residue number system without carry propagation for the high speed operation. and we implemented sigmoid active function which make it difficult to design neuron processor. The Designed circuits are descripted by VHDL and synthesized by Compass tools. we designed of MAC operation unit and sigmoid processing unit are proved that it could run time 19.6 nsec on the simulation and decreased to hardware size about 50%, each order. Designed digital neuron processor can be implementation in parallel distributed processing system with desired real time processing, In this paper.

A Design and Implementation of a Grid Job Monitoring Service Based on the OGSA(Open Grid Service Architecture) (OGSA(Open Grid Service Architecture)에 기반한 그리드 작업 모니터링 서비스 설계 및 구현)

  • Hahm, Jae-Gyoon;Kwon, Ok-Kyoung;Kim, Sang-Wan;Park, Hyoung-Woo
    • Proceedings of the Korea Information Processing Society Conference
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    • 2003.11a
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    • pp.213-216
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    • 2003
  • 그리드 컴퓨팅에 있어서 핵심적인 역할을 하는 그리드 미들웨어는 사용자에게 있어서 사용하기에 편리해야 한다. 사용자가 자신의 계산을 수행하려고 할 때 사용해야 할 자원의 위치 및 가용성 등에 대해서 지식이 없더라도 자원의 할당을 자율적으로 할 수 있어야 한다. 특히 그리드 작업은 대부분 병렬작업으로서 분산된 복수의 자원을 동시에 이용하게 되는데, 이러한 환경에서 작업에 대한 모니터링은 사용자의 편의성을 최대한 고려하여 통합적인 서비스를 제공해야 한다. 그리고 OGSA(Open Grid Service Architecture)는 그리드에 웹 서비스 개념을 도입하여, 그리드 서비스의 확장성 및 구현의 용이성을 크게 향상시켰다. OGSA를 이용하여 그리드 서비스를 개발함으로써 사용자가 직접 미들웨어를 이용하기에 용이하게 할 뿐만 아니라, 사용자 어플리케이션을 만드는데 있어서도 쉽게 할 수 있다. 따라서 본 논문에서는 OGSA를 이용하여 사용자에게 통합적인 모니터링 서비스를 제공하는 그리드 작업 모니터링 서비스를 구현하였다.

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The Implementation of Back Propagation Neural Network using the Residue Number System (잉여수계를 이용한 역전파 신경회로망 구현)

  • 홍봉화;이호선
    • The Journal of Information Technology
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    • v.2 no.2
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    • pp.145-161
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    • 1999
  • This paper proposes a high speed back propagation neural networks which uses the residue number system. making the high speed operation possible without carry propagation Consisting of MAC(Multiplication and Accumulation) operator unit using Residue number system and sigmoid function operator unit using Mixed Residue Conversion is designed, The Designed circuits are descripted by VHDL and synthesized by Compass tools. Result of simulations shows that critical path delay time is about 19nsec and the size can be reduced to 40% compared to the neural networks implemented by the real number operation unit. The proposed design circuits can be implemented in parallel distributed processing system with desired real time processing.

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