• Magazine of the Korea Concrete Institute
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• v.7 no.3
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• pp.187-198
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• 1995

This paper develops practical and reallstic reliabllity models and methods for the evaluation of system rehability and system rellabllity based ratlng of R.C box glrder bridge superstructures. The precise prediction of reberved carrying capacity of bridge as d system is extremely difficult especially when the brldges are highly redundant and slgnlficantly deter 1or;itcd or dainagetl. Thls papel proposes a nt2w approach for the evaluation of reseived system c,drrying capaaty of br~dges in terms ot equ~vdleiit system strength, which may b~ ddcflned as a brtdge system strength correipcmdlng tu the system rehability of the bridge. This cm be ticrAvcd from an Inverse process bami or1 the con~ept of FOSM(F1rst Order Second Moment) form of system reliabihty index. The sf rength llmt state models for K C box girder br~dges suggested In the paper dre based on the basi~ bending and shear strength And thc system reliatxllty pro,~lerri of box gritier super structure 1s formuldted as parallel serles models obtalncd f ~ o m thc FMA(Fdilure blode Rp proath) based on major failure mc>clmusrns or c~itlcal fdure ,>tatcs of each nuder .WOSM(Ad-vanced First Order Second Moment) and IST(1mportance Sampling Technique) simulation algorithm are used for the reliability analysis of the proposed models.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.94-104
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• 2008

In this paper, we propose a new architecture of multiplier-and-accumulator (MAC) for high speed multiplication and accumulation arithmetic. By combining multiplication with accumulation and devising a hybrid type of carry save adder (CSA), the performance was improved. Since the accumulator which has the largest delay in MAC was removed and its function was included into CSA, the overall performance becomes to be elevated. The proposed CSA tree uses 1's complement-based radix-2 modified booth algorithm (MBA) and has the modified array for the sign extension in order to increase the bit density of operands. The CSA propagates the carries by the least significant bits of the partial products and generates the least significant bits in advance for decreasing the number of the input bits of the final adder. Also, the proposed MAC accumulates the intermediate results in the type of sum and carry bits not the output of the final adder for improving the performance by optimizing the efficiency of pipeline scheme. The proposed architecture was synthesized with $250{\mu}m,\;180{\mu}m,\;130{\mu}m$ and 90nm standard CMOS library after designing it. We analyzed the results such as hardware resource, delay, and pipeline which are based on the theoretical and experimental estimation. We used Sakurai's alpha power low for the delay modeling. The proposed MAC has the superior properties to the standard design in many ways and its performance is twice as much than the previous research in the similar clock frequency.

• Proceedings of the Korea Water Resources Association Conference
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• 2005.05b
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• pp.1068-1072
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• 2005

조석이란, 해면의 완만한 주기적 승강을 말하며, 보통 그 승강은 1일 약 2회이나, 곳에 따라서는 1일 1회의 곳도 있다. 조석에 있어서는 이 밖에 수일의 주기를 갖는 약간 불규칙한 승강, 반년, 또는 1년을 주기로 하는 다소 규칙적인 승강까지 포함하여 취급한다. 그러나, 각 항만마다 갖는 특정적인 주기인 수분내지 수십분의 주기의 승강은 조석으로 취급하지 않는다. 조석은 해양의 제현상 중에서 예측가능성이 가장 큰 현장으로 이는 조석이 천체의 운행과 연관되기 때문이다. 조석이란 지구로부터 일정한 거리에서 각 고유의 속도를 가지는 적도상을 운행하는 무수의 가상천체에 기인하는 규칙적인 개개의 조석을 합성한 것이며 이 개개의 조석을 분조(Constituent)라 한다. 여기에서 사용되는 신경망 모형은 입력과 출력으로 구성되는 블랙박스 모형으로서 하나의 시스템을 병렬적으로 비선형적으로 구축할 수 있다는 장점 때문에 과거 하천유역의 강우-유출과정에서의 경우 유출현상을 해석하고 유출과정을 모형화 하기 위해 사용하였다. 본 연구에서는 기존의 조위 예측방법인 조화분석법이 아닌 인공신경망을 이용하여 조위예측을 실시하였다. 학습이라는 최적화 과정을 통해 구조와 기능이 복잡한 자연현상을 그대로 받아들여 축적시킴으로써 이를 지식으로 현상에 대한 재현능력이 뛰어나고, 또한 신경회로망의 연상기억능력에 적용하여 수학적으로 표현이 불가능한 불확실한 조위곡선에 적용하기에 유리한 장점을 가지고 있다. 본 연구의 목적은 과거 조위이론을 통해 이루었던 조위예측을 우리가 알기 쉬운 여러 기후인자(해면기압, 풍향, 풍속, 음력 등)에 따른 조위곡선을 예측하기 위해 신경망 모형을 이용하여 여수지역의 조위에 적용하여 비교 분석하고자 한다. May가 제안한 공식을 더 확장하여 적용할 수 있는 실험 공식으로 개선하였으며 다양한 조건에 대한 실험을 수행하여 보다 정밀한 공식으로 개선할 수 있었다.$10,924m^3/s$ 및 $10,075m^3/s$로서 실험 I의 $2,757m^3/s$에 비해 통수능이 많이 개선되었음을 알 수 있다.함을 알 수 있다. 상수관로 설계 기준에서는 관로내 수압을 $1.5\~4.0kg/cm^2$으로 나타내고 있는데 $6kg/cm^2$보다 과수압을 나타내는 경우가 $100\%$로 밸브를 개방하였을 때보다 $60\%,\;80\%$ 개방하였을 때가 더 빈번히 발생하고 있으므로 대상지역의 밸브 개폐는 $100\%$ 개방하는 것이 선계기준에 적합한 것으로 나타났다. 밸브 개폐에 따른 수압 변화를 모의한 결과 밸브 개폐도를 적절히 유지하여 필요수량의 확보 및 누수방지대책에 활용할 수 있을 것으로 판단된다.8R(mm)(r^2=0.84)$로 지수적으로 증가하는 경향을 나타내었다. 유거수량은 토성별로 양토를 1.0으로 기준할 때 사양토가 0.86으로 가장 작았고, 식양토 1.09, 식토 1.15로 평가되어 침투수에 비해 토성별 차이가 크게 나타났다. 이는 토성이 세립질일 수록 유거수의 저항이 작기 때문으로 생각된다. 경사에 따라서는 경사도가 증가할수록 증가하였으며 $10\% 경사일 때를 기준으로 $Ro(mm)=Ro_{10}{\times}0.797{\times}e^{-0.021s(\%)}$로 나타났다.천성 승모판 폐쇄 부전등을 초래하는 심각한 선

• Journal of the Korea Academia-Industrial cooperation Society
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• v.19 no.3
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• pp.669-678
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• 2018

This study developed information technology infrastructures for building a driving environment analysis platform using various big data, such as vehicle sensing data, public data, etc. First, a small platform server with a parallel structure for big data distribution processing was developed with H/W technology. Next, programs for big data collection/storage, processing/analysis, and information visualization were developed with S/W technology. The collection S/W was developed as a collection interface using Kafka, Flume, and Sqoop. The storage S/W was developed to be divided into a Hadoop distributed file system and Cassandra DB according to the utilization of data. Processing S/W was developed for spatial unit matching and time interval interpolation/aggregation of the collected data by applying the grid index method. An analysis S/W was developed as an analytical tool based on the Zeppelin notebook for the application and evaluation of a development algorithm. Finally, Information Visualization S/W was developed as a Web GIS engine program for providing various driving environment information and visualization. As a result of the performance evaluation, the number of executors, the optimal memory capacity, and number of cores for the development server were derived, and the computation performance was superior to that of the other cloud computing.

• Journal of KIISE:Software and Applications
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• v.34 no.12
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• pp.1056-1064
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• 2007

Biomolecular computing is a new computing paradigm that uses biomolecules such as DNA for information representation and processing. The huge number of molecules in a small volume and the innate massive parallelism inspired a novel computation method, and various computation models and molecular algorithms were developed for problem solving. In the meantime, the use of biomolecules for information processing supports the possibility of DNA computing as an application for biological problems. It has the potential as an analysis tool for biochemical information such as gene expression patterns. In this context, a DNA computing-based model of a biomolecular perceptron has been proposed and the result of its experimental implementation was presented previously. The weight encoding and weighted sum operation, which are the main components of a biomolecular perceptron, are based on the competitive hybridization reactions between the input molecules and weight-encoding probe molecules. However, thermodynamic symmetry in the competitive hybridizations is assumed, so there can be some error in the weight representation depending on the probe species in use. Here we suggest a generalized model of hybridization reactions considering the asymmetric thermodynamics in competitive hybridizations and present a weight encoding method for the reliable implementation of a biomolecular perceptron based on this model. We compare the accuracy of our weight encoding method with that of the previous one via computer simulations and present the condition of probe composition to satisfy the error limit.

• Journal of KIISE:Information Networking
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• v.34 no.3
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• pp.226-238
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• 2007

In this paper, we present a novel fully distributed topology control protocol that can construct the multiple-ring topology of Minimal Connected Dominating Set (MCDS) as the transport backbone for mobile ad hoc networks. It makes a topology from the minimal nodes that are chosen from all the nodes, and the constructed topology is comprised of the minimal physical links while preserving connectivity. This topology reduces the interference. The all nodes work as the nodes of the distributed parallel Boltzmann machine, of which the objective function is consisted of two Boltzmann factors: the link degree and the connection domination degree. To define these Boltzmann factors, we extend the Connected Dominating Set into a fuzzy set, and also define the fuzzy set of nodes by which the multiple-ring topology can be constructed. To construct the transport backbone of the mobile ad hoc network, the proposed protocol chooses the nodes that are the strong members of these two fuzzy sets as the clusterheads. We also ran simulations to provide the quantitative comparison against the related works in terms of the packet loss rate and the energy consumption rate. As a result, we show that the network that is constructed by the proposed protocol has far better than the other ones with respect to the packet loss rate and the energy consumption rate.

• Journal of Korea Multimedia Society
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• v.13 no.7
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• pp.1000-1015
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• 2010

In this paper, we propose a novel algorithm for hand gesture recognition. The hand detection method is based on human skin color, and we use the boundary energy information to locate the hand region accurately, then the moment method will be employed to locate the hand palm center. Hand gesture recognition can be separated into 2 step: firstly, the hand posture recognition: we employ the parallel NNs to deal with problem of hand posture recognition, pattern of a hand posture can be extracted by utilize the fitting ellipses method, which separates the detected hand region by 12 ellipses and calculates the white pixels rate in ellipse line. the pattern will be input to the NNs with 12 input nodes, the NNs contains 4 output nodes, each output node out a value within 0~1, the posture is then represented by composed of the 4 output codes. Secondly, the hand gesture tracking and recognition: we employed the Kalman filter to predict the position information of gesture to create the position sequence, distance relationship between positions will be used to confirm the gesture. The simulation have been performed on Windows XP to evaluate the efficiency of the algorithm, for recognizing the hand posture, we used 300 training images to train the recognizing machine and used 200 images to test the machine, the correct number is up to 194. And for testing the hand tracking recognition part, we make 1200 times gesture (each gesture 400 times), the total correct number is 1002 times. These results shows that the proposed gesture recognition algorithm can achieve an endurable job for detecting the hand and its' gesture.

• Spatial Information Research
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• v.19 no.3
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• pp.95-106
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• 2011

Recently as efficient processing of aggregate queries for fetching desired data from sensors has been recognized as a crucial part, in-network aggregate query processing techniques are studied intensively in wireless sensor networks. Existing representative in-network aggregate query processing techniques propose routing algorithms and data structures for processing aggregate queries. However, these aggregate query processing techniques have problems such as high energy consumption in sensor nodes, low accuracy of query processing results, and long query processing time. In order to solve these problems and to enhance the efficiency of aggregate query processing in wireless sensor networks, this paper proposes Bucket-based Parallel Aggregation(BPA). BPA divides a query region into several cells according to the distribution of sensor nodes and builds a Quad-tree, and then processes aggregate queries in parallel for each cell region according to routing. And it sends data in duplicate by removing redundant data, which, in turn, enhances the accuracy of query processing results. Also, BPA uses a bucket-based data structure in aggregate query processing, and divides and conquers the bucket data structure adaptively according to the number of data in the bucket. In addition, BPA compresses data in order to reduce the size of data in the bucket and performs data transmission filtering when each sensor node sends data. Finally, in this paper, we prove its superiority through various experiments using sensor data.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.11
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• pp.86-94
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• 2012

In this paper we propose a hardware architecture of high-speed CGH (computer generated hologram) generation processor, which particularly reduces the number of memory access times to avoid the bottle-neck in the memory access operation. For this, we use three main schemes. The first is pixel-by-pixel calculation rather than light source-by-source calculation. The second is parallel calculation scheme extracted by modifying the previous recursive calculation scheme. The last one is a fully pipelined calculation scheme and exactly structured timing scheduling by adjusting the hardware. The proposed hardware is structured to calculate a row of a CGH in parallel and each hologram pixel in a row is calculated independently. It consists of input interface, initial parameter calculator, hologram pixel calculators, line buffer, and memory controller. The implemented hardware to calculate a row of a $1,920{\times}1,080$ CGH in parallel uses 168,960 LUTs, 153,944 registers, and 19,212 DSP blocks in an Altera FPGA environment. It can stably operate at 198MHz. Because of the three schemes, the time to access the external memory is reduced to about 1/20,000 of the previous ones at the same calculation speed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.101-111
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• 2008

This paper introduces a high-speed Reed-Solomon(RS) decoder, which reduces the hardware complexity, and presents an RS decoder based FEC architecture which is used for 40Gb/s optical communication systems. We introduce new pipelined degree computationless modified Euclidean(pDCME) algorithm architecture, which has high throughput and low hardware complexity. The proposed 16 channel RS FEC architecture has two 8 channel RS FEC architectures, which has 8 syndrome computation block and shared single KES block. It can reduce the hardware complexity about 30% compared to the conventional 16 channel 3-parallel FEC architecture, which is 4 syndrome computation block and shared single KES block. The proposed RS FEC architecture has been designed and implemented with the $0.18-{\mu}m$ CMOS technology in a supply voltage of 1.8 V. The result show that total number of gate is 250K and it has a data processing rate of 5.1Gb/s at a clock frequency of 400MHz. The proposed area-efficient architecture can be readily applied to the next generation FEC devices for high-speed optical communications as well as wireless communications.