• The Journal of the Convergence on Culture Technology
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• v.9 no.6
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• pp.911-917
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• 2023

In today's world, we find ourselves facing energy crises due to factors such as war and climate crises. To prepare for these energy crises, many researchers continue to study systems related to energy monitoring and conservation, such as energy management systems, energy monitoring, and energy conservation. In line with these efforts, nations are making it mandatory for energy-consuming facilities to implement these systems. However, these facilities, limited by space and energy constraints, are exploring ways to improve. This research explores the operation of a data collection system using low-performance embedded devices. In this context, it proves that an optimized version of RocksDB, a Key-Value store, outperforms traditional databases when it comes to time-series data. Furthermore, a comprehensive database evaluation tool was employed to assess various databases, including optimized RocksDB and regular RocksDB. In addition, heterogeneous databases and evaluations are conducted using a UD Benchmark tool to evaluate them. As a result, we were able to see that on devices with low performance, the time required was up to 11 times shorter than that of other databases.

• Journal of the Korea Society of Computer and Information
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• v.29 no.8
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• pp.23-32
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• 2024

NVS (Novel View Synthesis) is a field in computer vision that reconstructs new views of a scene from a set of input views. Real-time rendering and high performance are essential for NVS technology to be effectively utilized in various applications. Recently, 3D-GS (3D Gaussian Splatting) has gained popularity due to its faster training and inference times compared to those of NeRF (Neural Radiance Fields)-based methodologies. However, since 3D-GS reconstructs a 3D (Three-Dimensional) scene by splitting and cloning (Density Control) Gaussian points, the number of Gaussian points continuously increases, causing the model to become heavier as training progresses. To address this issue, we propose two methodologies: 1) Gaussian blending, an improved density control methodology that removes unnecessary Gaussian points, and 2) a performance enhancement methodology using a depth estimation model to minimize the loss in representation caused by the blending of Gaussian points. Experiments on the Tanks and Temples Dataset show that the proposed methodologies reduce the number of Gaussian points by up to 4% while maintaining performance.

• The Transactions of the Korea Information Processing Society
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• v.13 no.9
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• pp.413-420
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• 2024

RISC-V is an open-source instruction set architecture, used in various hardware implementations, and can be flexibly expanded to meet system requirements through the RV64I base instruction set and 16 standard extensions. Currently, the RISC-V architecture employs the shadow stack technique to protect return addresses. This paper compares the performance of the compact shadow stack mechanism and the parallel shadow stack mechanism in the RISC-V architecture using the SPEC CPU 2017 and beebs benchmarks. Experimental results show that the parallel shadow stack mechanism exhibits higher overhead than the compact shadow stack mechanism. This suggests that the efficiency of the parallel mechanism is reduced due to the limitations of the RISC-V architecture, making the compact shadow stack more suitable for RISC-V. Additionally, this paper identifies the security limitations of the existing RISC-V shadow stack and proposes directions for enhancing the performance and security of shadow stack mechanisms to ensure a secure execution environment for RISC-V.

• The Journal of the Korea Contents Association
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• v.20 no.8
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• pp.368-374
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• 2020

Journaling file systems (JFS) manage changes of file systems not yet committed in a data structure known as a journal to restore the file system in the event of an unexpected failure. Extra write operations required for journaling negatively affect the performance of JFS. The high-performance and byte-addressable non-volatile memory (NVM) was expected to easily mitigate these performance problems by providing NVM space as journal storage. However, even with such non-volatile memory technologies, performance problems still arise due to scalability problems inherent in processing transactions of JFS. To solve this problem, we proposes a technique for processing file system transactions for scalable performance. To this end, lock-free data structures are used and multiple I/O requests are allowed to simultaneously be processed on high-performance storage devices with multiple I/O channels. We evaluate the file system with the proposed technique by comparing the original ext4 file system and the recent proposed NVM-based journaling file system on a multi-core server, and experimental results show that our file system has better performance (up-to 2.9/2.3 times) than the original ext4 file system and the recent NVM-based journaling file system, respectively.

• Journal of KIISE:Computer Systems and Theory
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• v.37 no.5
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• pp.292-303
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• 2010

On-chip cache memories play an important role in both performance and energy consumption points of view in resource-constrained embedded systems by filtering many off-chip memory accesses. We propose a 2-level data cache architecture with a low energy-delay product tailored for the embedded systems. The L1 data cache is small and direct-mapped, and employs a write-through policy. In contrast, the L2 data cache is set-associative and adopts a write-back policy. Consequently, the L1 data cache is accessed in one cycle and is able to provide high cache bandwidth while the L2 data cache is effective in reducing global miss rate. To reduce the penalty of high miss rate caused by the small L1 cache and power consumption of address generation, we propose an ECP(Early Cache hit Predictor) scheme. The ECP predicts if the L1 cache has the requested data using both fast address generation and L1 cache hit prediction. To reduce high energy cost of accessing the L2 data cache due to heavy write-through traffic from the write buffer laid between the two cache levels, we propose a one-way write scheme. From our simulation-based experiments using a cycle-accurate simulator and embedded benchmarks, the proposed 2-level data cache architecture shows average 3.6% and 50% improvements in overall system performance and the data cache energy consumption.

• Journal of KIISE
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• v.42 no.11
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• pp.1404-1409
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• 2015

In this paper, we present a novel approach to analyzing large-scale JavaScript applications statically by tuning the analysis scalability, possibly sacrificing soundness. For a given sound static baseline analysis of JavaScript programs, our framework allows users to define a sound approximation of selected executions that they wish to analyze, and it derives a tuned static analysis that can analyze the selected executions practically. The selected executions serve as parameters of the framework by taking a trade-off between the scalability and the soundness of the derived analyses. We formally describe our framework in the abstract interpretation setting and present two instances of the framework.

• The Journal of Society for e-Business Studies
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• v.11 no.4
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• pp.33-48
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• 2006

Since the emergence of XML as the standard for data exchange on the Web, XML warehousing technology is required to efficiently support Web business applications such as e-Commerce. When the RDBMS is employed as the storage for XML warehouse, XML materialized views of the XML warehouse could be provided by leveraging the materialized views of the RDBMS Because XML documents are mapped into relational tuples, an XML query defining an XML materialized view needs to be transformed into SQL. If relational materialized views were defined with the transformed SQL statements, the XML materialized view could be obtained just by XML-tagging the tuples of the corresponding relational materialized views. The foremost advantage of such a scheme is that the RDBMS does take care of XML materialized view consistency except XML tagging whenever their source XML documents are updated. In this paper, we proposed such a scheme of providing XML materialized views, and implemented it using a commercial RDBMS equipped with materialized view facility in Java on Windows 2000 Professional environment. XML documents in TPC-W, Web e-Commerce Benchmark, were used in performance experiments. The experimental results showed that our proposed scheme for XML materialized views was very effective.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.44 no.1
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• pp.51-58
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• 2007

This paper presented an adaptive pipeline architecture for a high-performance and low-power asynchronous processor. The proposed pipeline architecture employed a stage-skipping and a stage-combining scheme. The stage-skipping scheme can skip the operation of a bubble stage that is not used pipeline stage in an instruction execution. In the stage-combining scheme, two consecutive stages can be joined to form one stage if the latter stage is empty. The proposed pipeline architecture could reduce the processing time and power consumption. The proposed architecture supports multi-processing in the EX stage that executes parallel 4 instructions. We designed an asynchronous microprocessor to estimate the efficiency of the proposed pipeline architecture that was synthesized to a gate level design using a $0.35-{\mu}m$ CMOS standard cell library. We evaluated the performance of the target processor using SPEC2000 benchmark programs. The proposed architecture showed about 2.3 times higher speed than the asynchronous counterpart, AMULET3i. As a result, the proposed pipeline schemes and architecture can be used for asynchronous high-speed processor design

• Journal of KIISE:Computer Systems and Theory
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• v.36 no.6
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• pp.476-487
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• 2009

The virtual memory system in 4.4 BSD operating systems exploits a clustering scheme to reduce disk I/Os in paging out (or flushing) modified pages that are intended to be replaced in order to make free rooms in memory. Upon the page out of a victim page, the scheme stores a cluster (or group) of modified pages contiguous with the victim in the virtual address space to swap disk at a single disk write. However, it fails to find large clusters of contiguous pages if applications change pages not adjacent with each other in the virtual address space. To address the problem, we propose a new clustering scheme called Multiple-Object Clustering (MOC), which together stores multiple clusters in the virtual address space at a single disk write instead of paging out the clusters to swap space at separate disk I/Os. This multiple-cluster transfer allows the virtual memory system to significantly decrease disk writes, thus improving the page-out performance. Our experiments in the FreeBSD 6.2 show that MOC improves the execution times of realistic benchmarks such as NS2, Scimark2 SOR, and nbench LU over the traditional clustering scheme ranging from 9 to 45%.

• Journal of KIISE:Software and Applications
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• v.32 no.3
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• pp.215-226
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• 2005

Loop invariant code motion (LICM) optimization includes relatively heavy code analyses, thus being not readily applicable to Java Just-In-Time (JIT) compilation where the JIT compilation time is part of the whole running time. 'Classical' LICM optimization first analyzes the code and constructs both the def-use chains and the use-def chains. which are then used for performing code motions. This paper proposes a light-weight LICM algorithm, which requires only the def-use chains of loop invariant code (without use-def chains) by exploiting the fact that the Java virtual machine is based on a stack machine, hence generating code with simpler patterns. We also propose two techniques that allow more code motions than classical LICM techniques. First, unlike previous JIT techniques that uses LICM only in single-path loops for simplicity, we apply LICM to multi-path loops (natural loops) safely for partially redundant code. Secondly, we move loop-invariant, partially-redundant null pointer check code via predication support in Itanium. The proposed techniques were implemented in a JIT compiler for Itanium processor on ORP (Open Runtime Platform) Java virtual machine of Intel. On SPECjvrn98 benchmarks, the proposed technique increases the JIT compilation overhead by the geometric mean of 1.3％, yet it improves the total running time by the geometric mean of 2.2％.