• Title/Summary/Keyword: 민시프트

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Merge and Split of Players under MeanShift Tracking in Baseball Videos (야구 비디오에 대한 민시프트 추적 하에서 선수 병합 분리)

  • Choi, Hyeon-yeong;Hong, Sung-hwa;Ko, Jae-pil
    • Journal of Advanced Navigation Technology
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    • v.21 no.1
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    • pp.119-125
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    • 2017
  • In this paper, we propose a method that merges and splits players in the MeanShift tracking framework. The MeanShift tracking moves the center of tracking window to the maximum probability location given the target probability distribution. This tracking method has been widely used for real-time tracking problems because of its fast processing speed. However, it hardly handles occlusions in multiple object tracking systems. Occlusions can be usually solved by applying data association methods. In this paper, we propose a method that can be applied before data association methods. The proposed method automatically merges and splits the overlapped players by adjusting the each player's tracking map. We have compared the tracking performance of the MeanSfhit tracking algorithm and the proposed method.

Vision-based Mobile Robot Control System (비전 기반의 모바일 로봇 제어 시스템)

  • Chang Jae Sik;Kim Eun Yi;Jang Sang Su;Kim Hang Joon
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.07b
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    • pp.781-783
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    • 2005
  • 본 논문은 손 모양 인식을 이용한 비전 기반의 보행 로봇 제어 시스템을 제안한다. 손의 모양을 인식하기 위해서 움직이는 카메라 영상으로부터 정확한 손의 경계선물 추출하고 추적하는 일이 선행되어야 한다. 따라서 본 논문에서는 민 시프트 방법을 사용한 활성 윤곽선 모델 기반의 추적 방법을 제안한다. 제안된 시스템은 손 추출기, 손 추적기, 손 모양 인식기 그리고 로봇 제어기, 4개의 모들로 구성된다. 손 추출기는 영상에서 미리 정의된 손의 모양을 가지는 피부색 영역을 추출한다. 추출된 손의 추적은 활성 윤관선 모델과 민 시프트 방법을 사용하여 실행된다. 그 후 Hue moments를 사용하여 추적된 손의 모양을 인식한다. 제안된 방법을 평가하기 위해서 본 논문에서는 2족 보행 로봇 KHR-1에 제안된 방법을 적용 한다.

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Scheduling of Die Casting Processes Considering Power Usage (전력 사용을 고려한 다이캐스팅 공정의 스케줄링)

  • Yang, Jung-Min;Park, Yong-Kuk
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.8
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    • pp.3358-3365
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    • 2012
  • This paper presents a scheduling scheme for die casting processes considering power usage. The scheduling problem of a shift-based die casting process is represented by a linear programming (LP) model that maximizes the average efficiency of melting furnaces in regard of the usage of molten alloy, where the product quantities of each shift are used as primary variables. In this research, we propose a novel LP model that considers power usage of foundries. The developed LP model can derive product plans in which the expended power of a casting shift does not exceed a prescribed limit, while optimizing the efficiency of alloy usage. The simulation result of a case study demonstrates the superiority and applicability of the proposed scheme. This paper serves as a basic research on the role of foundries as an intelligent costumer in smart grid environment where the limit of power usage should be fulfilled.

Dataline Redundancy Circuit Using Simple Shift Logic Circuit for Dual-Port 1T-SRAM Embedded in Display ICs (디스플레이 IC 내장형 Dual-Port 1T-SRAM를 위한 간단한 시프트 로직 회로를 이용한 데이터라인 리던던시 회로)

  • Kwon, O-Sam;Min, Kyeong-Sik
    • Journal of IKEEE
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    • v.11 no.4
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    • pp.129-136
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    • 2007
  • In this paper, a simple but effective Dataline Redundancy Circuit (DRC) is proposed for a dual-port 1T-SRAM embedded in Display ICs. The DRC designed in the dual-port $320{\times}120{\times}18$-bit 1T-SRAM is verified in a 0.18-um CMOS 1T-SRAM process. In the DRC, because its control logic circuit can be implemented by a simple Shift Logic Circuit (SLC) with only an inverter and a NAND that is much simpler than the conventional, it can be placed in a pitch as narrow as a bit line pair. Moreover, an improved version of the SLC is also proposed to reduce its worst-case delay from 12.3ns to 5.9ns by 52%. By doing so, the timing overhead of the DRC can be hidden under the row cycle time because switching of the datalines can be done between the times of the word line setup and the sense amplifier setup. The area overhead of the DRC is estimated about 7.6% in this paper.

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Construction of Semi-Algebra Low Density Parity Check Codes for Parallel Array Processing (병렬 어레이 프로세싱을 위한 반집합 대수 LDPC 부호의 구성)

  • Lee Kwang-jae;Lee Moon-ho;Lee Dong-min
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.30 no.1C
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    • pp.1-8
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    • 2005
  • In this paper, we present a novel LDPC code construction called as semi-algebra low density parity check(LDPC) codes which is one kind of deterministic LDPC code based on dual-diagonal sub-matrix. The constructing method results in a class of high rate LDPC codes. Codes in this class have a large girth and good minimum distances. Furthermore, they can be implemented by simple parallel array architecture using cyclic shift register and perform well with the iterative decoding.

Illumination-Robust Load Lane Color Recognition based on S-color Space (조명변화에 강인한 S-색상공간 기반의 차선색상 판별 방법)

  • Baek, Seung-Hae;Jin, Yan;Lee, Geun-Mo;Park, Soon-Yong
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.22 no.3
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    • pp.434-442
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    • 2018
  • In this paper, we propose a road lane color recognition method from the image obtained from a driving vehicle. In autonomous vehicle techniques, lane information becomes more important as the level of autonomous driving such as lane departure warning and dynamic lane keeping assistance is increased. In particular the lane color recognition, especially the white and the yellow lanes, is necessary technique because it is directly related to traffic accidents. In this paper, color information of lane and road area is mapped to a 2-dimensional S-color space based on lane detection. And the center of the feature distribution is obtained by using an improved mean-shift algorithm in the S-color space. The lane color is determined by using the distance between the center coordinates of the color features of the left and right lanes and the road area. In various illumination conditions, about 97% color recognition rate is achieved.