• The KIPS Transactions:PartD
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• v.17D no.1
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• pp.9-16
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• 2010

Web service mashup bacomes one of the important web application development methods. This paper considers a client based mashup, where a page interfaces many service methods asynchronously. Browser systems execute callbacks when the corresponding reply arrives, possibly concurrent to user interface actions. In this case, callbacks and user interface actions share data memory and screen. Moreover, when the user is able to send another request before the previous ones have replied, the shared resource problem becomes more complicated. In order to solve the multiple requests problem, our contributions are as follows. First, we modeled a mashup page with user actions and callbacks, and we presented several types of callbacks. Secondly, concurrency condition is defined between callbacks and user actions in terms of shared resources, and the test method is presented. Also, we proposed the serialization approach to guarantee the safe execution of callbacks. Finally, we applied the proposed concurrency condition on XForms language and extended the XForms browser to implement the proposed approach. The prototype implementation showed that the proposed approach helps enhancing user experience on mashup pages.

• KIPS Transactions on Software and Data Engineering
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• v.5 no.11
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• pp.521-526
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• 2016

As on-line informal text data have massive in its volume and have unstructured characteristics in nature, there are limitations in applying traditional relational data model technologies for data storage and data analysis jobs. Moreover, using dynamically generating massive social data, social user's real-time reaction analysis tasks is hard to accomplish. In the paper, to capture easily the semantics of massive and informal on-line documents with unsupervised learning mechanism, we design and implement automatic topic extraction systems according to the mass of the words that consists a document. The input data set to the proposed system are generated first, using N-gram algorithm to build multiple words to capture the meaning of the sentences precisely, and Hadoop and Spark (In-memory distributed computing framework) are adopted to run topic model. In the experiment phases, TB level input data are processed for data preprocessing and proposed topic extraction steps are applied. We conclude that the proposed system shows good performance in extracting meaningful topics in time as the intermediate results come from main memories directly instead of an HDD reading.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.19 no.4
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• pp.35-39
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• 2019

The shielding effectiveness (SE) of the EMI spray coating film was measured in a three-dimensional structure. The shielding effectiveness was measured by AST D4935 using coaxial type TEM cell. A standard sample of the cylindrical slab is fabricated to measure the shielding effectiveness using the ASTM D4935. At this time, spray coating was performed by bonding a three-dimensional structure with NAND flash memory to a standard sample. In the case of spray coating, it was uniformly coated not only on the horizontal plane but also on the vertical plane of the three-dimensional structure. As a result of measurement, shielding effectiveness of maximum 59 dB was measured in a three-dimensional structure similar to the case without three-dimensional structure. As a result, it was confirmed that the spray coating can be uniformed even in the three-dimensional structure.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.31 no.4
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• pp.687-699
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• 2021

When a vulnerability occurs in a program, it is documented and published through CVE. However, some vulnerabilities do not disclose the details of the vulnerability and in many cases the source code is not published. In the absence of such information, in order to find a vulnerability, you must find the vulnerability at the binary level. This paper aims to find out-of-bounds read vulnerability that occur very frequently among vulnerability. In this paper, we design a memory area using memory access information appearing in binary code. Out-of-bounds Read vulnerability is detected through the designed memory structure. The proposed tool showed better in code coverage and detection efficiency than the existing tools.

• Journal of the Korea institute for structural maintenance and inspection
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• v.27 no.5
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• pp.49-56
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• 2023

This study proposed a damage location estimation method for automated image-based port infrastructure inspection. Memory efficiency was improved by calculating the homography matrix using feature detection technology and outlier removal technology, without going through the 3D modeling process and storing only damage information. To develop an algorithm specialized for port infrastructure, the algorithm was optimized through ground-truth coordinate pairs created using images of port infrastructure. The location errors obtained by applying this to the sample and concrete wall were (X: 6.5cm, Y: 1.3cm) and (X: 12.7cm, Y: 6.4cm), respectively. In addition, by applying the algorithm to the concrete wall and displaying it in the form of an exterior damage map, the possibility of field application was demonstrated.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.12
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• pp.1970-1982
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• 1993

This paper describes an efficient array algorithm for parallel computation of vector-radix two-dimensional (2-D) fast discrete cosine transform (VR-FCT), and its VLSI implementation. By mapping the 2-D VR-FCT onto a 2-D array of processing elements (PEs), the butterfly structure of the VR-FCT can be efficiently importanted with high concurrency and local communication geometry. The proposed array algorithm features architectural modularity, regularity and locality, so that it is very suitable for VLSI realization. Also, no transposition memory is required, which is invitable in the conventional row-column decomposition approach. It has the time complexity of O(N+Nnzp-log2N) for (N*N) 2-D DCT, where Nnzd is the number of non-zero digits in canonic-signed digit(CSD) code, By adopting the CSD arithmetic in circuit desine, the number of addition is reduced by about 30%, as compared to the 2`s complement arithmetic. The computational accuracy analysis for finite wordlength processing is presented. From simulation result, it is estimated that (8*8) 2-D DCT (with Nnzp=4) can be computed in about 0.88 sec at 50 MHz clock frequency, resulting in the throughput rate of about 72 Mega pixels per second.

• Journal of Korea Multimedia Society
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• v.3 no.5
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• pp.526-534
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• 2000

There have been many researches on the 3D graphic accelerator for high speed by needs of CAD/CAM,3D modeling, virtual reality or medical image. In this paper, an SIMD processor architecture for 3D graphic accelerator is proposed in order to improve the processing time of the 3D graphics, and a parallel Phong shading algorithm is presented to estimate performance of the proposed architecture. The proposed SIMD processor architecture for 3D graphic accelerator consists of PCI local bus interface, 16 Processing Elements (PE's), and Park's multi-access memory system (NAMS) that has 17 memory modules. A serial algorithm for Phong shading is modified for the architecture and the main key is to divide a polygon into $4\times{4}$ squares. And, for processing a square, 4 PE's are regarded as a PE Grou logically. Since MAMS can support block access type with interval 1, it is possible that 4 PE Groups process a square at a time. In consequence, 16 pixels are processed simultaneously. The proposed SIMD processor architecture is simulated by CADENCE Verilog-XL that is a package for the hardware simulation. With the same simulated results as that of the serial algorithm, the speed enhancement by the parallel algorithm to the serial one is 5.68.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.18 no.1
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• pp.57-68
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• 1993

In this paper, we describe a multiprocessor system using the HiPi bus with pended protocol and multiple cache memories, and evalute the performance of the multiprocessor system in terms of processor utilization for various cache coherence protocols. The HiPi bus is delveloped as the shared bus of TICOM II which is a main computer system to establish a nation-wide computing network in ETRI. The HiPi bus has high data transfer rate, but it doesn't allow cache-to-cache transfer. In order to evaluate the effect of cache-to-cache transfer upon the performance of system and to choose a best-performed protocol for HiPi bus, we simulate as follows: First, we analyze the performance of multiprocessor system with HiPi bus in terms of processor utilizatIOn through simulation. Each of cache coherence protocol is described by state transition diagram, and then the probability of each state is calculated by Markov steady state. The calculated probability of each state is used as input parameters of simulation, and modeling and simulation are implemented and performed by using SLAM II graphic symbols and language. Second, we propose the HiPi bus which supports cache-to-cache transfer, and analyze the performance of multiprocessor system with proposed HiPi bus in terms of processor utilization through simulation. Considered cache coherence protocols for the simulation are Write-through, Write-once, Berkely, Synapse, Illinois, Firefly, and Dragon.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.2
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• pp.140-149
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• 2008

Recently, the need for accessing information from anywhere at any time has been a driving force for a variety of mobile applications. As the number of mobile applications increases rapidly, there has been a growing demand for the use of Service Oriented Architectures(SOA) for various applications. Mobile based SOA offers a systematic way to classify and assess technical realizations of business processes. But mobile has severly restricted range of utilizing services in computing environment and more, a mobile computer is envisioned to be equipped with more powerful capabilities, including the storage of a small database, the capacity of data processing, a narrow user input and small size of display. This paper present mobile adaption method based on SOA to overcome mobile restriction. To improve mobile efficient we analyzing mobile application requirement writing service specification, optimizing design, providing extended use case specification which test use case testing and testing service test case which derived from service specification. We discuss an mobile application testing that uses a SOA as a model for deploying discovering, specifying, integrating, implementing, testing, and invoking services. Such a service use case specification and testing technique including some idea could help the mobile application to develop cost efficient and dependable mobile services.

• Journal of Internet Computing and Services
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• v.10 no.5
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• pp.65-78
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• 2009

The most commonly adopted approach to find valuable information from tree data is to extract frequently occurring subtree patterns from them. Because mining frequent tree patterns has a wide range of applications such as xml mining, web usage mining, bioinformatics, and network multicast routing, many algorithms have been recently proposed to find the patterns. However, existing tree mining algorithms suffer from several serious pitfalls in finding frequent tree patterns from massive tree datasets. Some of the major problems are due to (1) modeling data as hierarchical tree structure, (2) the computationally high cost of the candidate maintenance, (3) the repetitious input dataset scans, and (4) the high memory dependency. These problems stem from that most of these algorithms are based on the well-known apriori algorithm and have used anti-monotone property for candidate generation and frequency counting in their algorithms. To solve the problems, we base a pattern-growth approach rather than the apriori approach, and choose to extract maximal frequent subtree patterns instead of frequent subtree patterns. The proposed method not only gets rid of the process for infrequent subtrees pruning, but also totally eliminates the problem of generating candidate subtrees. Hence, it significantly improves the whole mining process.