• Journal of the Korean Vacuum Society
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• v.22 no.3
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• pp.144-149
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• 2013

We use Memory function to examine the thermal conductivity as a function of the temperature in single-walled carbon nanotube (SWNT). We determine the Umklapp, normal and SWNT-substrate phonon scattering rate from the computed inverse spin relaxation time. Thermal conductivity increased as the diameter increased when we assumed that the zigzag (10,0) transition was a more dominant phonon scattering than the (9,0) transition.

• Journal of KIISE:Software and Applications
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• v.36 no.7
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• pp.590-606
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• 2009

We present a static analyzer that detects memory leaks in C programs. It achieves relatively high accuracy at a relatively low cost on SPEC2000 benchmarks and several open-source software packages, demonstrating its practicality and competitive edge against other reported analyzers: for a set of benchmarks totaling 1,777 KLOCs, it found 332 bugs with 47 additional false positives (a 12.4% false-positive ratio), and the average analysis speed was 720 LOC/sec. We separately analyze each procedure's memory behavior into a summary that is used in analyzing its call sites. Each procedural summary is parameterized by the procedure's call context so that it can be instantiated at different call sites. What information to capture in each procedural summary has been carefully tuned so that the summary should not lose any common memory-leak-related behaviors in real-world C program. Because each procedure is summarized by conventional fixpoint iteration over the abstract semantics ('a la abstract interpretation), the analyzer naturally handles arbitrary call cycles from direct or indirect recursive calls.

• Journal of Korea Society of Industrial Information Systems
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• v.20 no.5
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• pp.13-23
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• 2015

This thesis proposes a method for effectively detecting memory errors with low occurrence frequency that may occur depending on runtime situation by analyzing assembly codes obtained by disassembling an executable file. When applying the proposed method to various programs having no compilation error, a total of about 750 potential errors taken about 90 seconds are detected among 1 million lines of assembly codes corresponding to a total of about 10 thousand functions.

• The KIPS Transactions:PartA
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• v.11A no.5
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• pp.373-382
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• 2004

In this paper, a register promotion technique that translates memory accesses to register accesses is presented to enhance embedded software performance. In the proposed method, a source code is profiled to generate a memory trace. From the profiling results, target functions with high dynamic call counts are selected, and the proposed register promotion technique is applied only to the target functions to save the compilation time. The memory trace of the target functions is searched for the memory accesses that result in cycle count reduction when replaced by register accesses, and they are translated to register accesses by modifying the intermediate code and allocating promotion registers. The experiments on MediaBench and DSPstone benchmark programs show that the proposed method increases the performance by 14% and 18% on the average for ARM and MCORE, respectively.

• Proceeding of EDISON Challenge
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• 2013.04a
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• pp.217-220
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• 2013

기존 플래시 메모리의 물리적 한계를 극복하여 저전압, 저전력 비휘발성 메모리 소자를 얻기 위해서는 터널링 장벽 제어가 필수적이며, 저유전체와 고유전체를 적층한 VARIOT 구조는 터널링 장벽 제어에 매우 효과적이다. 우리는 비평형 그린함수 방법을 이용하여 전자 수송을 계산함으로써, VARIOT 구조가 기존의 단일 유전층 구조에 비해 비휘발성 메모리 관점에서 얼마나 향상되었는지를 분석하고, 터널링 장벽 제어에 있어 고유전체가 가져야 할 가장 유리한 조건을 찾아내었다. 또한 유효질량이 에너지 장벽(유전층)의 전계 민감도와 거의 무관함을 보임으로서 시뮬레이션 결과가 합리적임을 증명하였다.

• Proceedings of the Korean Information Science Society Conference
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• 2006.10d
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• pp.661-665
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• 2006

모션 캡쳐 기반 컴퓨터 애니메이션 제작 기술은 컴퓨터 애니메이션 제작에 매우 광범위하게 사용되고 있다. 모션 캡쳐 기반 컴퓨터 애니메이션 제작 기술은 센서를 사용해서 대상체의 운동을 측정하여 운동 렌더링 파라미터를 추출한 후, 이 운동 파라미터를 컴퓨터에 옮겨서 그래픽 툴을 사용하여 애니메이션화 한다. 이러한 일련의 작업이 현재의 데스크 톱 컴퓨터에서는 문제없이 수행될 수 있지만, 모바일 임베디드 시스템에 그대로 적용되기에는 다소 무리가 있다. 왜냐하면, 모바일 임베디드 시스템의 경우, CPU의 계산 능력과 메모리의 크기가 매우 작기 때문에 이에 특화된 방법이 필요하게 된다. 이러한 취지에서 본 논문은 모바일 임베디드 시스템에서 메모리 사용 효율을 높이기 위해서, 추출된 운동 렌더링 파라미터의 데이터량을 줄여서 메모리에 저장하는 방안을 모색한다. 일반적으로 사용되는 영상 압축 기술은 복원 과정이 복잡해서 모바일 임베디드 시스템의 적은 계산력에 무리를 줄 수 있으므로, 가능한 복원 과정도 계산량이 적은 방안을 강구할 필요가 있다. 이와 같은 목적으로 본 논문에서는 추출된 운동 렌더링 파라미터의 프레임 별 변화를 시간 정합 함수로 모델링 하여, 정합 함수의 파라미터를 메모리에 저장하고, 정합 함수의 함수값 계산을 통해 운동 파라미터를 복원해 내는 쉽고 효율적인 방법을 제안한다. 그리고 본 정합 데이터 압축 방식을 사용하여 상용화된 모바일 임베디드 멀티미디어 시스템에서 효율적인 모션 캡쳐 기반 컴퓨터 애니메이션 제작을 시현한다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.10
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• pp.85-94
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• 2004

In this paper, a register allocation techlique that translates memory accesses to register accesses Is presented to enhance embedded software performance. In the proposed method, a source code is profiled to generate a memory trace. From the profiling results, target functions with high dynamic call counts are selected, and the proposed register allocation technique is applied only to the target functions to save the compilation time. The memory trace of the target functions is searched for the memory accesses that result in cycle count reduction when replaced by register accesses, and they are translated to register accesses by modifying the intermediate code and allocating Promotion registers. The experiments where the performance is measured in terms of the cycle count on MediaBench and DSPstone benchmark programs show that the proposed method increases the performance by 14% and 18% on the average for ARM and MCORE, respectively.

• The Journal of the Korea institute of electronic communication sciences
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• v.8 no.1
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• pp.105-111
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• 2013

We have developed an analog associative memory implemented with an analog array which has linear writing and erasing characteristics. The associative memory adopts a winner-take-all strategy. The operation for reading in the memory is executed with an absolute differencing circuit and a winner-take-all (WTA) circuit suitable for a nearest-match function of a content-addressable memory. We also present a system architecture that enables highly-paralleled fast writing and quick readout as well as high integration density. A multiple memory cell configuration is also presented for achieving higher integration density, quick readout, and fast writing. The system technology presented here is ideal for a real time recognition system. We simulate the function of the mechanism by menas of Hspice with $1.2{\mu}$ double poly CMOS parameters of MOSIS fabrication process.

• Journal of KIISE:Computer Systems and Theory
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• v.32 no.9
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• pp.457-464
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• 2005

In this paper a 3D memory system that allows 17 access types at an arbitrary position is introduced. The proposed memory system is based on two main functions: memory module assignment function and address assignment function. Based on them, the memory system supports 17 access types: 13 Lines, 3 Rectangles, and 1 Hexahedron. That is, the memory system allows simultaneous access to multiple data in any access types at an arbitrary position with a constant interval. In order to allow 17 access types the memory system consists of memory module selection circuitry, data routing circuitry for READ/WRITE, and address calculation/routing circuitry In the point of view of a developer and a programmer, the memory system proposed in this paper supports easy hardware extension according to the applications and both of them to deal with it as a logical three-dimensional away In addition, multiple data in various across types can be simultaneously accessed with a constant interval. Therefore, the memory system is suitable for building systems related to ,3D applications (e.g. volume rendering and volume clipping) and a frame buffer for multi-resolution.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 1998.12a
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• pp.527-536
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• 1998

블록암호의 설계에서 S-box는 가장 중요한 요소이다. S-box의 크기는 기존공격에 대한 안전도와 수행 시 필요한 메모리량, 수행속도가 동시에 고려되어 선택되어야 한다. 일반적으로 S-box의 입출력의 크기가 커지면 안전도와 메모리 소요량은 크게 증가하며 수행속도는 저하된다. 한편, GF(2$^{n}$ )에서의 멱함수(power permutation)는 DC, LC에 강하므로 여러 암호에 적용되었으나 최근 고계차분공격(higher order differential attack)과 보간공격 (interpolation attack)에 의해 공격된 바 있다. 본문에서는 DC, LC, 고계차분공격, 보간공격에 안전한 S-box로서 GF(2$^{n}$ )에서의 멱함수인 $\chi$$^{-2}$ $^{k}$ (k < n)를 구성하고, n이 짝수일 때 메모리 소요량이 보다 적은 구현방법으로서 GF(2$^{n}$ 2/)의 연산을 이용하는 방법을 제시한다.