• Title/Summary/Keyword: 멀티미디어 프로세서

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Implementation of Wireless Contents Access PMP using ARM 9 Embedded System (ARM 9 임베디드 시스템에 의한 무선 컨텐츠 액세스 PMP 구현)

  • Han, Kyong-Ho;Kim, Hee-Su
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.21 no.2
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    • pp.99-105
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    • 2007
  • In this paper, diskless personal multimedia player(PMP) that can access and decode the remote large multimedia data is implemented via wireless network. To implement this, WLAN based NFS protocol is used to connect PMP to the remote server and text image and movie files are decoded and played using ARM9 cored PXA255 embedded processor and Linux OS. The fuction and performance of the PMP is evaluated and verified using variuos types of contents. Linux kernel elements are configured and built in according to the hardware and software on the target board to install on the target board. The confirming result shows the required functions and performances.

A Study on the Realization of Digital Multimedia Broadcast Receiving System using Conditional Access System (제한수신시스템을 적용한 디지털 멀티미디어방송 수신시스템 구현에 관한 연구)

  • Kim, Young-Bin;Ryu, Kwang-Ryol
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.2
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    • pp.340-343
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    • 2005
  • A realization for digital multimedia receiving system using Conditional Access System is presented in this paper. The key word for descrambling is make from smart card and Conditional Access System, a Stabilization is grow up in the method. It is possible to decoding that of average 15 fame/second of H.264 video format and that 24Khz${\sim}$48Khz audio sample rate using dual processor that of high performance DSP and RISC. This system is evaluated correct descrambling procedure in test stream added that signed user data.

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An Efficient Algorithm of Network Bandwidth Allocations for Multimedia Services (멀티미디어 서비스를 위한 효율적인 대역폭 할당)

  • 김정택;고인선
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.27 no.11C
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    • pp.1112-1123
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    • 2002
  • Providing a multimedia service requires efficient network bandwidth allocation scheduling. Typically, transmission of information with bursty characteristics, such as a video data stream, utilizes some type of smoothing technique that reduces the transmission rate fluctuation. While capable of a drastic reduction in the peak transmission rate, even the optimum smoothing algorithm proposed to date, however, is rather inadequate for multi-stream applications that share network bandwidth since such an algorithm has been designed and applied toward handling each independent stream. In this paper, we proposed an efficient bandwidth allocation algorithm that addresses these shortcomings. The proposed bandwidth allocation algorithm is divided into two steps, a static bandwidth allocation and a dynamic bandwidth allocation. In the former case, the peak rate reduction is achieved by maintaining the accumulated data in the user buffer at a high level, whereas the concept of real demand factor is employed to meet the needs of multi-stream bandwidth allocation in the latter case, Finally, the proposed algorithm's performance was verified with ExSpect 6.41, a Petri net simulation tool.

A Design of an OLED/TFT LCD controller based on Embedded System (임베디드 시스템 기반의 OLED/TFT LCD 컨트롤러 설계)

  • Cho, Young-Sung;Shin, Kyung-Wook;Lee, Yong-Hwan
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • v.9 no.1
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    • pp.1030-1033
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    • 2005
  • Today's most equipments that contain embedded system only support simple menus and background graphics. However, as the embedded system is applied for much more various fields and the user's needs for graphical interface become higher, the support for multimedia and moving pictures became an important criterion to evaluate the performance of a equipment. Because the present embedded system uses software to construct display environment, it is difficult to meet the bandwidth for multimedia contents and moving pictures. Using software for graphic also lowers the performance of the main function by overloading the processor. In this paper, we present an OLED/TFT-LCD controller suitable for embedded systems. The architecture we propose is described in HDL and the performance is evaluated in comparison with the existing embedded systems.

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Development of Industrial Embedded System Platform (산업용 임베디드 시스템 플랫폼 개발)

  • Kim, Dae-Nam;Kim, Kyo-Sun
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.47 no.5
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    • pp.50-60
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    • 2010
  • For the last half a century, the personal computer and software industries have been prosperous due to the incessant evolution of computer systems. In the 21st century, the embedded system market has greatly increased as the market shifted to the mobile gadget field. While a lot of multimedia gadgets such as mobile phone, navigation system, PMP, etc. are pouring into the market, most industrial control systems still rely on 8-bit micro-controllers and simple application software techniques. Unfortunately, the technological barrier which requires additional investment and higher quality manpower to overcome, and the business risks which come from the uncertainty of the market growth and the competitiveness of the resulting products have prevented the companies in the industry from taking advantage of such fancy technologies. However, high performance, low-power and low-cost hardware and software platforms will enable their high-technology products to be developed and recognized by potential clients in the future. This paper presents such a platform for industrial embedded systems. The platform was designed based on Telechips TCC8300 multimedia processor which embedded a variety of parallel hardware for the implementation of multimedia functions. And open-source Embedded Linux, TinyX and GTK+ are used for implementation of GUI to minimize technology costs. In order to estimate the expected performance and power consumption, the performance improvement and the power consumption due to each of enabled hardware sub-systems including YUV2RGB frame converter are measured. An analytic model was devised to check the feasibility of a new application and trade off its performance and power consumption. The validity of the model has been confirmed by implementing a real target system. The cost can be further mitigated by using the hardware parts which are being used for mass production products mostly in the cell-phone market.

Design and Implementation of Multi-channel FFT Processor for MIMO Systems (MIMO 시스템을 위한 다채널 FFT 프로세서의 설계 및 구현)

  • Jung, Yongchul;Cho, Jaechan;Jung, Yunho
    • Journal of Advanced Navigation Technology
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    • v.21 no.6
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    • pp.659-665
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    • 2017
  • In this paper, a low complexity fast Fourier transform(FFT) processor is proposed for multiple input multiple output(MIMO) systems. The IEEE 802.11ac standard has been adopted along with the demand for a system capable of high channel capacity and Gbps transmission in order to utilize various multimedia services using a wireless LAN. The proposed scalable FFT processor can support the variable length of 64, 128, 256, and 512 for 8x8 antenna configuration as specified in IEEE 802.11ac standard with MIMO-OFDM scheme. By reducing the required number of non-trivial multipliers with mixed-radix(MR) and multipath delay commutator(MDC) architecture, the complexity of the proposed FFT processor was dramatically decreased. Implementation results show that the proposed FFT processor can reduced the logic gate count by 50%, compared with the radix-2 SDF FFT processor. Also, compared with the 8-channel MR-2/2/2/4/2/4/2 MDC processor and 8-channel MR-2/2/2/8/8 MDC processor, it is shown that the gate count is reduced by 18% and 17% respectively.

Design and Optimization of Mu1ti-codec Video Decoder using ASIP (ASIP를 이용한 다중 비디오 복호화기 설계 및 최적화)

  • Ahn, Yong-Jo;Kang, Dae-Beom;Jo, Hyun-Ho;Ji, Bong-Il;Sim, Dong-Gyu;Eum, Nak-Woong
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.48 no.1
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    • pp.116-126
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    • 2011
  • In this paper, we present a multi-media processor which can decode multiple-format video standards. The designed processor is evaluated with optimized MPEG-2, MPEG-4, and AVS (Audio video standard). There are two approaches for developing of real-time video decoders. First, hardware-based system is much superior to a processor-based one in execution time. However, it takes long time to implement and modify hardware systems. On the contrary, the software-based video codecs can be easily implemented and flexible, however, their performance is not so good for real-time applications. In this paper, in order to exploit benefits related to two approaches, we designed a processor called ASIP(Application specific instruction-set processor) for video decoding. In our work, we extracted eight common modules from various video decoders, and added several multimedia instructions to the processor. The developed processor for video decoders is evaluated with the Synopsys platform simulator and a FPGA board. In our experiment, we can achieve about 37% time saving in total decoding time.

Implementation of FPGA-based SoC Design Verification System for a Soundbar with Embedded Processor (사운드바(Soundbar)를 위한 프로세서 내장 SoC 설계 검증을 위한 FPGA 시스템의 구현)

  • Kim, Sung-Woo;Lee, Seon-Hee;Choi, Seong-Jhin
    • Journal of Broadcast Engineering
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    • v.21 no.5
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    • pp.792-802
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    • 2016
  • Real time verification is necessary, since there are several features that cannot be verified through design simulation in the design of multiband soundbar system. And then this paper describes an implementation of an FPGA-based real-time verification system for a soundbar SoC with an embedded processor. It is verified a real-time performance test and a listening test which are several features in the design stage that cannot be verified through a design simulation. The measurement of quantitative specifications such as SNR, THD+N, frequency response, etc. as well as the listening test were performed through the implemented FPGA system, and it was verified that test results satisfied the target specifications.

Design of Security Method for Network Rendering of Augmented Reality Object (홀로그램 용 증강현실 객체의 네트워크 랜더링을 위한 보안 기법 설계)

  • Kim, Seoksoo;Kim, Donghyun
    • Journal of Convergence for Information Technology
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    • v.9 no.1
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    • pp.92-98
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    • 2019
  • Due to the development of hologram display technology, various studies are being conducted to provide realistic contents for augmented reality. In the case of the HMD for hologram, since augmented reality objects must be rendered by a small processor, it is necessary to use a low-capacity content. To solve this problem, there is a need for a technique of rendering resources by providing resources through a network. In the case of the existing augmented reality system, there is no problem of contents modulation because the resources are loaded and rendered in the internal storage space. However, when providing resources through the network, security problems such as content tampering and malicious code insertion should be considered. Therefore, in this paper, we propose a network rendering technique applying security techniques to provide augmented reality contents in a holographic HMD device.

Embracing Device Characteristics for Dynamic Adaptive Video Streaming (DLNA 기기 특성을 고려한 동적 적응형 스트리밍에 대한 연구)

  • Kim, Mijung;Jin, Feng;Yoon, Ilchul;Jin, Xianshu
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2014.05a
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    • pp.574-577
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    • 2014
  • Multimedia contents sharing services based on DLNA (Digital Living Network Alliance) technology such as Allshare or Smartshare in wireless home networks is widely adapted in Korea. However, the characteristics of the wireless network - frequently fluctuated bandwidth and signal strength could degrade the quality perceived by users. To minimize the impact of the challenge there are active researches in dynamic adaptive streaming. This paper proposes a dynamic adaptive streaming approach designed in a wireless network taking into account of the specifications of the user device such as resolution and processor. We modify the Kalman filter considering the characteristics of the device and demonstrate that the proposed approach determines Bit Rate using the modified filter.

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