• Journal of the Korea Society of Computer and Information
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• v.11 no.3
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• pp.161-166
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• 2006

In this paper, CPLD low power technology mapping using reuse module selection under the time constraint is proposed. Traditional high-level synthesis do not allow reuse of complex, realistic datapath component during the task of scheduling. On the other hand, the proposed algorithm is able to approach a productivity of the design the low power to reuse which given a library of user-defined datapath component and to share of resource sharing on the switching activity in a shared resource Also, we are obtainable the optimal the scheduling result in experimental results of our using chaining and multi-cycling in the scheduling techniques. Low power circuit make using CPLD technology mapping algorithm for selection reuse module by scheduling.

• Korean Journal of Optics and Photonics
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• v.14 no.6
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• pp.657-662
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• 2003

Optimum Hamming apodized acousto-optic 2${\times}$2 add/drop multiplexers, using SiO$_2$ film loaded acoustic waveguide with angular offset to the Ti:LiNbO$_3$ waveguide, were fabricated. The four-port device consists of two input waveguides, a polarization beam splitter (PBS), two polarization conversion/acoustooptic tuning waveguide sections, a second PBS and two output waveguides. Insertion loss <7.1 ㏈ has been obtained and side-lobe of -19 ㏈ for -32 ㎽ RF driving power has been realized. Add/drop performance has been confirmed and a linear tuning rate of 8.1 nm/MHz and a 3 ㏈ spectral width of -1.5 nm were demonstrated.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.3
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• pp.208-214
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• 2021

Recently, much of the intelligent security scenario and criminal investigation demands for matching photo and non-photo. Existing face recognition system can not sufficiently guarantee these needs. In this paper, we propose an algorithm to improve the performance of heterogeneous face recognition systems by reducing the different modality between sketches and photos of the same person. The proposed algorithm extracts each image's texture features through texture descriptors (gray level co-occurrence matrix, multiscale local binary pattern), and based on this, generates a transformation matrix through eigenfeature regularization and extraction techniques. The score value calculated between the vectors generated in this way finally recognizes the identity of the sketch image through the score normalization methods.

• Journal of the Korea Society of Computer and Information
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• v.14 no.7
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• pp.97-103
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• 2009

This paper proposes efficient routing scheme named MP-DD(MultiPath-Direct Diffusion) which is simple enough to be applicable to the wireless sensor networks. Conventional DD uses only one optimal path, therefore it consumes more energy of specific nodes. MP-DD uses multiple path and has a information of hop upstream node in the direction of the base-station is determined which are obtainable via the process of self-organization of the network. Simulation results show the feasibility of the simple routing schemes for the sensor networks.

• The Journal of the Korea Contents Association
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• v.8 no.5
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• pp.72-81
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• 2008

High Performance DSP usually supports cache and internal memory. For an optimal implementation of a multimedia stream application on such a high performance DSP, one needs to utilize the cache and internal memory efficiently. In this paper, we investigate performance analysis of cache, and internal memory configuration and placement necessary to achieve an optimal implementation of multimedia stream applications like motion picture encoder on high performance DSP, TMS320C6000 series, and propose strategies to improve performance for cache and internal memory placement. From the results of analysis and experiments, it is verified that 2-way L2 cache configuration with the remaining memory configured as internal memory shows relatively good performance. Also, it is shown that L1P cache hit rate is enhanced when frequently called routines and routines having caller-callee relationships with them are continuously placed in the internal memory and that L1D cache hit rate is enhanced by the simple change of the data size. The results in the paper are expected to contribute to the optimal implementation of multimedia stream applications on high performance DSPs.

• KIPS Transactions on Computer and Communication Systems
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• v.6 no.5
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• pp.219-230
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• 2017

General-Purpose Graphics Processing Units (GPGPUs) build massively parallel architecture and apply multithreading technology to explore parallelism. By using programming models like CUDA, and OpenCL, GPGPUs are becoming the best in exploiting plentiful thread-level parallelism caused by parallel applications. Unfortunately, modern GPGPU cannot efficiently utilize its available hardware resources for numerous general-purpose applications. One of the primary reasons is the inefficiency of existing warp/thread block schedulers in hiding long latency instructions, resulting in lost opportunity to improve the performance. This paper studies the effects of hardware thread scheduling policy on GPGPU performance. We propose a novel warp scheduling policy that can alleviate the drawbacks of the traditional round-robin policy. The proposed warp scheduler first classifies the warps of a thread block into two groups, warps with long latency and warps with short latency and then schedules the warps with long latency before the warps with short latency. Furthermore, to support the proposed warp scheduler, we also propose a supplemental technique that can dynamically reduce the number of streaming multiprocessors to which will be assigned thread blocks when encountering a high contention degree at the memory and interconnection network. Based on our experiments on a 15-streaming multiprocessor GPGPU platform, the proposed warp scheduling policy provides an average IPC improvement of 7.5% over the baseline round-robin warp scheduling policy. This paper also shows that the GPGPU performance can be improved by approximately 8.9% on average when the two proposed techniques are combined.

• Journal of the Korea Society of Computer and Information
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• v.25 no.6
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• pp.109-117
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• 2020

An edutainment system aims to help learners to recognize problems effectively, grasp and classify important information needed to solve the problems and convey the contents of what they have learned. Edutainment contents can be usefully applied to education and training in the both scientific and industrial areas. Our present work proposes an edutainment system that can be applied to a drug discovery process including virtual screening by using intuitive multi-modal interfaces. In this system, a stereoscopic monitor is used to make three-dimensional (3D) macro-molecular images, with supporting multi-modal interfaces to manipulate 3D models of molecular structures effectively. In this paper, our system can easily solve a docking simulation function, which is one of important virtual drug screening methods, by applying gaming factors. The level-up concept is implemented to realize a bio-game approach, in which the gaming factor depends on number of objects and users. The quality of the proposed system is evaluated with performance comparison in terms of a finishing time of a drug docking process to screen new inhibitors against target proteins of human immunodeficiency virus (HIV) in an e-drug discovery process.

• Journal of Broadcast Engineering
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• v.17 no.3
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• pp.503-518
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• 2012

In this paper, we propose a complexity-based parallelization method of the sample adaptive offset (SAO) algorithm which is one of HEVC in-loop filters. The SAO algorithm can be regarded as region-based process and the regions are obtained and represented with a quad-tree scheme. A offset to minimize a reconstruction error is sent for each partitioned region. The SAO of the HEVC can be parallelized in data-level. However, because the sizes and complexities of the SAO regions are not regular, workload imbalance occurs with multi-core platform. In this paper, we propose a LCU-based SAO algorithm and a complexity prediction algorithm for each LCU. With the proposed complexity-based LCU processing, we found that the proposed algorithm is faster than the sequential implementation by a factor of 2.38 times. In addition, the proposed algorithm is faster than regular parallel implementation SAO by 21%.

• The Journal of the Acoustical Society of Korea
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• v.23 no.2
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• pp.180-186
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• 2004

The presence of noise in speech signals degrades the performance of recognition systems in which there are mismatches between the training and test environments. To make a speech recognizer robust, it is necessary to compensate these mismatches. In this paper, we studied about an improvement of stochastic feature extraction based on band-SNR for robust speech recognition. At first, we proposed a modified version of the multi-band spectral subtraction (MSS) method which adjusts the subtraction level of noise spectrum according to band-SNR. In the proposed method referred as M-MSS, a noise normalization factor was newly introduced to finely control the over-estimation factor depending on the band-SNR. Also, we modified the architecture of the stochastic feature extraction (SFE) method. We could get a better performance when the spectral subtraction was applied in the power spectrum domain than in the mel-scale domain. This method is denoted as M-SFE. Last, we applied the M-MSS method to the modified stochastic feature extraction structure, which is denoted as the MMSS-MSFE method. The proposed methods were evaluated on isolated word recognition under various noise environments. The average error rates of the M-MSS, M-SFE, and MMSS-MSFE methods over the ordinary spectral subtraction (SS) method were reduced by 18.6%, 15.1%, and 33.9%, respectively. From these results, we can conclude that the proposed methods provide good candidates for robust feature extraction in the noisy speech recognition.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.3
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• pp.1-8
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• 2009

DS-CDMA system has very low bandwidth efficiency, hence it is difficult to maintain high spreading gain for high speed data transmission. Offset stacked spreading CDMA(OSS-CDMA) is a transmission scheme where spreading codes with chip offsets are overlapped, then transmitted. This kind of system requires a code set that guarantees orthogonality between codes in the set of any cjip offset. An orthogonal complementary code set has a property that the crosscorrelation function between codes in the group is zero for all shifts, hence it can be used for an OSS-CDMA system. In an OCC-OSS CDMA system each user is assigned an orthogonal complementary code group. User data bit is spread by the given codes and overlapped, and the code sequences are transmitted with multicarrier. However, the offset stacked spread sequences are multilevel, and the number of symbol levels is increases as the spreading efficiency is increased. When the OSS sequence is transmitted with MPSK mapping, the signal constellation becomes dense, and the system is easily affected by channel impairments. In this paper, we propose a level clipping scheme on OSS sequence before MPSK modulated. Simulations have been carried out to investigate the BER performance of the OCC-OSS CDMA system in AWGN environment. The results show that proposed scheme outperform the scheme without level clipping.