• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.44 no.4 s.316
• /
• pp.51-59
• /
• 2007

In this paper, we propose an efficient hardware architecture for H.264/AVC CAVLC (Context-based Adaptive Variable Length Coding) decoding which used for baseline profile and extended profile. Previous CAVLC architectures are consisted of five step block and each block gets effective bits from Controller block and Accumulator. If large number of non-zero coefficients exist, process for getting effective bits has to iterates many times. In order to reduce this unnecessary process, we propose two techniques, which combine five steps into four steps and reduce process to get efficiency bit by skipping addition step. By adopting these two techniques, the required processing time was reduced about 26% compared with previous architectures. It was designed in a hardware description language and total logic gate count was 16.83k using 0.18um standard cell library.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.39 no.6
• /
• pp.51-58
• /
• 2002

In this paper, a 155/311 Mb/s MUX/DEMUX chip using ECL macrocell away has been developed with a single device. This device for a 2.5 Gb/s SDH based transmission system is to interleave the parallel data of 51 Mb/s into 155 Mb/s(or 311 Mb/s) serial data output, and is to interleave a serial input bit stream of 155 Mb/s(or 311 Mb/s) into the parallel output of 51 Mb/s. The input and output of the device ate TTL compatible at the low-speed end, but 100k ECL compatible at the high-speed end. The device has been fabricated with Motorola ETL3200 macrocell away The fabricated chip shows the typical phase margin of 180 degrees and output data skew less than 220ps at the high-speed end.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.36 no.1B
• /
• pp.21-28
• /
• 2011

The femtocell is a miniaturized Base Station (BS) with low-cost and low-power using general broadband access network as backhaul. It is expected not only to improve indoor coverage but also to reduce a service charge. However, in IEEE 802,16e femtocells, when the Mobile Station (MS) scans neighbor BSs for handover, it takes a long time due to too many number of femto BSs. Also the size of the neighbor advertisement message that will be periodically sent by a serving BS is increased as the number of target femto BSs for scanning increases. In this paper, we proposed an efficient femtocell scanning scheme, using a triangulation mechanism and a femto BS monitoring scheme to reduce the number of scanning operations and the size of the neighbor advertisement messages. The proposed scheme can avoid wasting air resources and reduce scanning overheads by minimal scanning operation. The simulation results showed that the proposed scheme could improve scanning performance and avoid wasting air resources, compared with the conventional scheme of the IEEE 802.16e system.

• Journal of Internet Computing and Services
• /
• v.19 no.1
• /
• pp.11-17
• /
• 2018

In this paper, we propose a novel frequency reuse method using the fractional frequency reuse (FFR) for enterprise femtocell networks (EFNs) in which a lot of femtocell base stations (fBSs) are deployed in a buinding, e.g., business companies, department stores, etc, and evaluate the system performance for the downlink of EFNs. First, we introduce the concept of the split reuse method to allocate the frequency bandwidth with considering the interference between the macrocell and femtocell. Then, we propose the resource allocation with the FFR for fBSs of EFNs to reduce the interference and increase the system capacity. Through simulations, we show that the proposed FFR method outperforms a traditional resource allocation method with frequency reuse factor 4 in terms of the mean fUE capacity, total EFN capacity, and outage probability.

• Journal of KIISE:Information Networking
• /
• v.28 no.3
• /
• pp.321-335
• /
• 2001

The explosive growth in wireless networking increasingly urges the demand to support mobility within the Internet which is what Mobile-IP aims to provide. Because the transmission of signals through open-air s easy to be attacked, it is important to provide secure transmission for mobile users and make them responsible for what they have done in networks. Although IETF provides a secret-key based security mechanism, those mechanisms suffer from scalability, efficiency and non-repudiation service problem. The proposed mechanism uses public-key based authentication optimizing the performance. It includes non-repudiation service on the side of mobile for airtight security in wireless network. The simulation results show that the proposed authentication reduces the total registration time. It especially minimizes the computation cost on the side of the mobile node and solves the power problem. In practice, the proposed authentication is feasible with reasonable performance and security service in macro mobility that Mobile-IP is intended to solve.

• Journal of the Korea Society for Simulation
• /
• v.20 no.1
• /
• pp.107-116
• /
• 2011

Recently, femtocell has been concerned as one of effective solutions to relieve shadow region and provide high quality services to users in indoor environments. Even though femtocell offers various benefits to cellular operators and users, many technical issues, such as interference coordination, network synchronization, self-configuration, self-optimization, and so on, should be solved to deploy the femtocell in current network. In this paper, we develop a simulator for evaluating performance of long term evolution (LTE) femtocell systems under various interference scenarios. The simulator consists of a main-module and five sub-modules. The main-module connects and manages five sub-modules which have the functionality managing user mobility, packet scheduling, call admission control, traffic generation, and modulation and coding scheme (MCS). To provide user convenience, the simulator adopts graphical user interface (GUI) which can observes simulation results in real time. We expect that this simulator can contribute to developing effective femtocell systems by supporting a tool for analyzing the effect of interference between macrocell and femtocell.

• Journal of the Korea Society of Computer and Information
• /
• v.15 no.6
• /
• pp.49-56
• /
• 2010

In this paper, a joint PHY-MAC layer optimized resource allocation scheme for OFDMA based micro base stations is investigated. We propose cross-layer optimized two-stage resource allocation scheme including cross-layer functional description and control information flow between PHY-MAC layers. The proposed two-stage resource allocation scheme consists of a user grouping stage and a resource allocation stage. In the user grouping stage, users are divided into a macro base station user group and a micro base station user group based on the PHY-MAC layer characteristics of each user. In the resource allocation stage, a scheduling scheme and an allotment of resources are determined. In the proposed scheme, diversity and adaptive modulation and coding (AMC) schemes are exploited as schedulers. Simulation results demonstrate that the proposed scheme increases the average cell throughput about 40~80 % compared to the conventional system without micro base stations.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.44 no.7 s.361
• /
• pp.45-53
• /
• 2007

In this paper, we propose an efficient hardware architecture for H.264/AVC CAVLC (Context-based Adaptive Variable Length Coding) encoding. Previous CAVLC architectures search all of the coefficients to find statistic characteristics in a block. However, it is unnecessary information that zero coefficients following the last position of a non-zero coefficient when CAVLC encodes residual coefficients. In order to reduce this unnecessary operation, we propose two techniques, which detect the first and last position of non-zero coefficients and arrange non-zero coefficients sequentially. By adopting these two techniques, the required processing time was reduced about 23% compared with previous architecture. It was designed in a hardware description language and total logic gate count is 16.3k using 0.18um standard cell library Simulation results show that our design is capable of real-time processing for $1920{\times}1088\;30fps$ videos at 81MHz.

• Journal of Internet Computing and Services
• /
• v.24 no.5
• /
• pp.1-7
• /
• 2023

This paper proposes a small cell resource partitioning allocation method to solve interference to machine type communication devices (MTCD) and improve performance in 5G heterogeneous networks (HetNet) where macro base station (MBS) and many small cell base stations (SBS) are overlaid. In the 5G HetNet, since various types of MTCDs generate data traffic, the load on the MBS increases. Therefore, in order to reduce the MBS load, a cell range expansion (CRE) method is applied in which a bias value is added to the received signal strength from the SBS and MTCDs satisfying the condition is connected to the SBS. More MTCDs connecting to the SBS through the CRE will reduce the load on the MBS, but performance of MTCDs will degrade due to interference, so a method to solve this problem is needed. The proposed small cell resource partitioning allocation method allocates resources with less interference from the MBS to mitigate interference of MTCDs newly added in the SBS with CRE, and improve the overall MTCD performace using separating resources according to the performance of existing MTCDs in the SBS. Through simulation results, the proposed small cell resource partitioning allocation method shows performance improvement of 21% and 126% in MTCDs capacity connected to MBS and SBS respectively, compared to the existing resource allocation methods.

• Journal of the Institute of Electronics Engineers of Korea SP
• /
• v.42 no.2 s.302
• /
• pp.27-36
• /
• 2005

This thesis proposed an effective encryption method for the DCT-based image/video contents and made it possible to operate in a high speed by implementing it as an optimized hardware. By considering the increase in the amount of the calculation in the image/video compression, reconstruction and encryption, an partial encryption was performed, in which only the important information (DC and DPCM coefficients) were selected as the data to be encrypted. As the result, the encryption cost decreased when all the original image was encrypted. As the encryption algorithm one of the multi-mode AES, DES, or SEED can be used. The proposed encryption method was implemented in software to be experimented with TM-5 for about 1,000 test images. From the result, it was verified that to induce the original image from the encrypted one is not possible. At that situation, the decrease in compression ratio was only $1.6\%$. The hardware encryption system implemented in Verilog-HDL was synthesized to find the gate-level circuit in the SynopsysTM design compiler with the Hynix $0.25{\mu}m$ CMOS Phantom-cell library. Timing simulation was performed by Verilog-XL from CadenceTM, which resulted in the stable operation in the frequency above 100MHz. Accordingly, the proposed encryption method and the implemented hardware are expected to be effectively used as a good solution for the end-to-end security which is considered as one of the important problems.