• Proceedings of the KAIS Fall Conference
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• 한국산학기술학회 2000년도 추계학술대회
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• pp.194-198
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• 2000

최근 저장 장치로 많이 사용되고 있는 IBM PC의 CD-ROM(Compact Disc Read Only Memory)과 MP3(MPEG-1 Layer Ⅲ Audio) 디코더 칩을 이용하여 PC 작동과 관계없이 독립적으로 작동하는 CD-ROM 기반의 MP3 Player를 구현하였다. 여기서는 CD-ROM의 규격과 CD-ROM에 사용되는 ATAPI(AT Attachment Packet Interface) Format, MPEG-1 Layer Ⅲ의 오디오 부분에 대하여 알아보고 MP3 디코더 칩을 사용하여 CD-ROM에서 읽은 MP3 데이터즐 재생하는 방법을 취하였다. 이리하여 PC 자체로 MP3를 작동시키는 부하를 경감시키는 효과를 얻었다.

• Journal of the Institute of Electronics Engineers of Korea SD
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• 제40권7호
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• pp.532-541
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• 2003

In a memory, most power is dissipated in high capacitive lines such as predecoder lines, word lines, and bit lines. To reduce the power dissipation in these high capacitive lines, this paper proposes three techniques using charge recycling and charge sharing. One is the charge recycling predecoder (CRPD). The second one is the charge recycling word line decoder (CRWD). The last one is the charge sharing bit line (CSBL) for a ROM. The CRPD and the CRWD recycle the previously used charge in predecoder lines and word lines. Theoretically, the power consumption in predecoder lines and word lines are reduced to a half. The CSBL reduces the swing voltage in the ROM bit lines to very small voltage using a charge sharing technique. the CSBL can significantly reduce the power dissipation in ROM bit lines. The CRPD, the CRWD, and the CSBL consume 82%, 72%, and 64% of the power of previous ROM designs respectively. A charge recycling and charge sharing ROM (CRCS-ROM) with the CRPD, the CRWD, and the CSBL is implemented. A CRCS-ROM with 8K16bits was fabricated in a 0.3${\mu}{\textrm}{m}$ CMOS process. The CRCS-ROM consumes 8.63㎽ at 100MHz with 3.3V. The chip core area is 0.1 $\textrm{mm}^2$.

• Journal of Broadcast Engineering
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• 제15권1호
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• pp.112-121
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• 2010

Distributed video coding is a coding paradigm that allows complexity to be shared between encoder and decoder, in contrast with conventional video coding. We propose that complexity balancing method of encoder/decoder by phase motion estimation algorithm. The encoder performs partial motion estimation. The result of the partial motion estimation is transferred to the decoder, and the decoder performs motion estimation within the narrow range. When the encoder can afford some complexity, complexity balancing is possible. The method proposed is able to know relativity between complexity balancing and coding efficiency. The coding efficiency increase rate by the encoder complexity increases is higher than that by the decoder complexity increases. The proposed method can control the complexity and coding efficiency according to devices' resources and channel conditions.

• Journal of Software Assessment and Valuation
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• 제17권2호
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• pp.47-57
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• 2021

Neuromorphic technology is proposed to complement the shortcomings of existing artificial intelligence technology by mimicking the human brain structure and computational process with hardware. NA-IDE has also been proposed for developing neuromorphic hardware-based IoT applications. To implement an SNN model in NA-IDE, commonly used input data must be transformed for use in the SNN model. In this paper, we implemented a neural coding method encoder component that converts image data into a spike train signal and uses it as an SNN input. The decoder component is implemented to convert the output back to image data when the SNN model generates a spike train signal. If the decoder component uses the same parameters as the encoding process, it can generate static data similar to the original data. It can be used in fields such as image-to-image and speech-to-speech to transform and regenerate input data using the proposed encoder and decoder.

• The Journal of the Acoustical Society of Korea
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• 제43권2호
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• pp.253-259
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• 2024

This paper proposes a new speech enhancement model based on a complex nested U-Net with a dual-branch decoder. The proposed model consists of a complex nested U-Net to simultaneously estimate the magnitude and phase components of the speech signal, and the decoder has a dual-branch decoder structure that performs spectral mapping and time-frequency masking in each branch. At this time, compared to the single-branch decoder structure, the dual-branch decoder structure allows noise to be effectively removed while minimizing the loss of speech information. The experiment was conducted on the VoiceBank + DEMAND database, commonly used for speech enhancement model training, and was evaluated through various objective evaluation metrics. As a result of the experiment, the complex nested U-Net-based speech enhancement model using a dual-branch decoder increased the Perceptual Evaluation of Speech Quality (PESQ) score by about 0.13 compared to the baseline, and showed a higher objective evaluation score than recently proposed speech enhancement models.

• Journal of the Korean Institute of Telematics and Electronics
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• 제27권3호
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• pp.31-39
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• 1990

An optimization problem of AND-EXOR PLA's with input decoders can be regarded as a minimization problem of Exclusive-Or Sum-Of-Products expressions (ESOP's) for multiple-valued input two-valued output functions. In this paper, We propose a minimization algorithm for ESOP's. The algorithm is based on an iterative improvement. Five rules are used to replace a pair of products with another one. We minimized many ESOP's for arithmetic circuits. In most cases, ESOP's required fewer products than SOP's to realized same functions.

• The Journal of Korean Institute of Communications and Information Sciences
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• 제11권1호
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• pp.53-63
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• 1986

In this paper the decoder of nonbinary code satisfying R>1/t has been designed and constructed, where R is the code rate and t is the error correcting capability. In order to design the error trapping decoder, the concept of covering monomial is used and them the decoder system using the (15, 11) Reed-Solomon code is implemented. Without Galois Fiedl multiplication and division circuits, the decoder system is simply constructed. In the decoding process, it takes 60clocks to decode one code word. Two symbol errors and eight binary burst errors are simultaneously corrected. This coding system is shown to be efficient when the channel error probability is approximately from $5{\times}10^-4$~$5{\times}10^-5$.

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 한국통신학회 1985년도 춘계학술발표회논문집
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• pp.1-5
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• 1985

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 한국통신학회 1983년도 추계학술발표회논문집
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• pp.73-76
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• 1983

• Proceedings of the Korean Institute of Communication Sciences Conference
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• 한국통신학회 1985년도 추계학술발표회 논문집
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• pp.89-92
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• 1985