• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.3
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• pp.77-85
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• 2008

This work proposes a 12b 130MS/s 108mW $1.8mm^2$ 0.18um CMOS ADC for high-quality video systems such as TFT-LCD displays and digital TVs requiring simultaneously high resolution, low power, and small size at high speed. The proposed ADC optimizes power consumption and chip area at the target resolution and sampling rate based on a three-step pipeline architecture. The input SHA with gate-bootstrapped sampling switches and a properly controlled trans-conductance ratio of two amplifier stages achieves a high gain and phase margin for 12b input accuracy at the Nyquist frequency. A signal-insensitive 3D-fully symmetric layout reduces a capacitor and device mismatch of two MDACs. The proposed supply- and temperature- insensitive current and voltage references are implemented on chip with a small number of transistors. The prototype ADC in a 0.18um 1P6M CMOS technology demonstrates a measured DNL and INL within 0.69LSB and 2.12LSB, respectively. The ADC shows a maximum SNDR of 53dB and 51dB and a maximum SFDR of 68dB and 66dB at 120MS/s and 130MS/s, respectively. The ADC with an active die area of $1.8mm^2$ consumes 108mW at 130MS/s and 1.8V.

• Journal of IKEEE
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• v.7 no.2 s.13
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• pp.236-244
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• 2003

In this paper, RF and IF circuits for mobile terminals which have usually been implemented using expensive BiCMOS processes are designed using CMOS circuits, and a Tx CMOS RF/IF single chip for PCS applications is designed. The designed circuit consists of an IF block including an IF PLL frequency synthesizer, an IF mixer, and a VGA and an RF block including a SSB RF mixer and a driver amplifier, and performs all transmit signal processing functions required between digital baseband and the power amplifier. The phase noise level of the designed IF PLL frequency synthesizer is -114dBc/Hz@100kHz and the lock time is less than $300{\mu}s$. It consumes 5.3mA from a 3V power supply. The conversion gain and OIP3 of the IF mixer block are 3.6dB and -11.3dBm. It consumes 5.3mA. The 3dB frequencies of the VGA are greater than 250MHz for all gain settings. The designed VGA consumes 10mA. The designed RF block exhibits a gain of 14.93dB and an OIP3 of 6.97dBm. The image and carrier suppressions are 35dBc and 31dBc, respectively. It consumes 63.4mA. The designed circuits are under fabrication using a $0.35{\mu}m$ CMOS process. The designed entire chip consumes 84mA from a 3V supply, and its area is $1.6㎜{\times}3.5㎜$.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.08a
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• pp.210.2-210.2
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• 2013

현재 국내의 상용화된 디지털 방식 X-선 영상장치에서 간접변환방식은 대부분 CsI를 사용하고 있으며, X-선 흡수에 의해 전기적 신호를 발생시키는 직접변환방식은 Amorphous Selenium(a-Se)을 사용한다. a-Se은 진공 중에 녹는점이 낮아 증착시 substrate의 온도에 따라 민감한 변화를 보인다. 본 연구에서는 간접변환방식에 비해 높은 영상의 질을 획득할 수 있는 직접변환방식의 a-Se기반 X-선 검출기 제작 시 substrate에 인가된 온도에 따른 특성을 연구하여 최적화 된 substrate의 온도를 알고자 한다. 본 실험에서는 glass에 투명한 전극물질인 Indium Tin Oxide (ITO)가 electrode로 형성된 substrate를 사용하였으며 그 상단에 a-Se을 Physical Vapor Deposition (PVD)방식을 거쳐 X-선 검출기 샘플을 제작하였다. PVD 공정 시 네 개의 보트에 a-Se 시료를 각각 100g씩 총 400g을 넣고, $5{\times}10-5Torr$까지 진공도를 낮추었다. 보트의 온도는 $270^{\circ}C$에서 40분 $290^{\circ}C$에서 90분으로 온도를 인가하여 a-Se을 기화시켜 증착하였다. 증착 시 substrate 온도를 각각 $20^{\circ}C$, $40^{\circ}C$, $60^{\circ}C$, $70^{\circ}C$ 네 종류로 나누어 실험을 진행하였다. 끝으로 증착된 a-Se 상단에 Au를 PVD방식으로 electrode를 형성시켜 a-Se기반의 X-선 검출기 샘플 제작을 완료하였다. 제작된 a-Se기반의 X-선 검출기 샘플의 두께는 80에서 $85{\mu}m$로 온도에 따른 차이가 없었다. 이후에 전기적 특성을 평가하기위해 electrometer와 oscilloscope를 이용하여 Dark current와 Sensitivity를 측정하여 Signal to Noise Ratio(SNR)로 도출하였으며 Scanning Electron Microscope(SEM) 표면 uniformity를 관찰하였다. 또한 제작된 a-Se기반 X-선 검출기 샘플의 hole collection 성능을 확인하고자 mobility를 측정하였다. 측정결과 a-Se의 work function을 고려한 $10V/{\mu}m$기준에서 70kV, 100mA, 0.03sec의 조건의 X-선을 조사 하였을 때 Sensitivity는 세 종류의 검출기 샘플이 15nC/mR-cm2에서 18nC/mR-cm2으로 비슷한 양상을 나타내었지만, substrate온도가 $70^{\circ}C$때의 샘플은 10nC/mR-cm2이하로 저감됨을 알 수 있었다. 그리고 substrate온도 $60^{\circ}C$에서 제작된 검출기 샘플의 전기적 특성이 SNR로 환산 시, 15.812로 가장 우수한 전기적 특성을 나타내어 최적화 된 온도임을 알 수 있었다. SEM촬영 시 온도상승에 따라 표면 uniformity가 우수하였으며, Mobility lifetime에서는 $60^{\circ}C$에서 제작된 검출기 샘플이 deep trap 수치가 높아 hole이 $0.04584cm2/V{\cdot}sec$로 $0.00174cm2/V{\cdot}sec$의 electron보다 26.34배가량 빠른 것을 확인하였다. 본 연구를 통해 a-Se증착 시, substrate에 인가된 온도는 균일한 박막의 형성 및 표면구조에 영향을 미치며 온도가 증가할수록 안정적인 전기적 특성을 나타내지만 $70^{\circ}C$이상일 시, a-Se층의 결정화가 생겨 deep trap을 발생시켜 전기적 특성이 저하됨을 확인 할 수 있었다. 따라서 증착 시의 substrate의 온도 최적화는 a-Se기반 X-선 검출기의 안전성 및 성능향상을 위해 불가피한 요소가 된다고 사료된다.

• The Journal of Society for e-Business Studies
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• v.27 no.2
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• pp.205-218
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• 2022

Recently, digital transformation in manufacturing has been accelerating. It results in that the data collection technologies from the shop-floor is becoming important. These approaches focus primarily on obtaining specific manufacturing data using various sensors and communication technologies. In order to expand the channel of field data collection, this study proposes a method to automatically collect manufacturing data based on vision-based artificial intelligence. This is to analyze real-time image information with the object detection and tracking technologies and to obtain manufacturing data. The research team collects object motion information for each frame by applying YOLO (You Only Look Once) and DeepSORT as object detection and tracking algorithms. Thereafter, the motion information is converted into two pieces of manufacturing data (production performance and time) through post-processing. A dynamically moving factory model is created to obtain training data for deep learning. In addition, operating scenarios are proposed to reproduce the shop-floor situation in the real world. The operating scenario assumes a flow-shop consisting of six facilities. As a result of collecting manufacturing data according to the operating scenarios, the accuracy was 96.3%.

• Journal of the Microelectronics and Packaging Society
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• v.30 no.2
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• pp.1-12
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• 2023

In the current era of the global mobile smart device revolution, electronic devices are required in all spaces that people interact with. The establishment of the internet of things (IoT) among smart devices has been recognized as a crucial objective to advance towards creating a comfortable and sustainable future society. In-mold electronic (IME) processes have gained significant industrial significance due to their ability to utilize conventional high-volume methods, which involve printing functional inks on 2D substrates, thermoforming them into 3D shapes, and injection-molded, manufacturing low-cost, lightweight, and functional components or devices. In this article, we provide an overview of IME and its latest advances in application. We review biomimetic nanomaterials for constructing self-supporting biosensor electronic materials on the body, energy storage devices, self-powered devices, and bio-monitoring technology from the perspective of in-mold electronic devices. We anticipate that IME device technology will play a critical role in establishing a human-machine interface (HMI) by converging with the rapidly growing flexible printed electronics technology, which is an integral component of the fourth industrial revolution.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.3
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• pp.46-55
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• 2016

This work proposes a 13b 100MS/s 45nm CMOS ADC with a high dynamic performance for IF-domain high-speed signal processing systems based on a four-step pipeline architecture to optimize operating specifications. The SHA employs a wideband high-speed sampling network properly to process high-frequency input signals exceeding a sampling frequency. The SHA and MDACs adopt a two-stage amplifier with a gain-boosting technique to obtain the required high DC gain and the wide signal-swing range, while the amplifier and bias circuits use the same unit-size devices repeatedly to minimize device mismatch. Furthermore, a separate analog power supply voltage for on-chip current and voltage references minimizes performance degradation caused by the undesired noise and interference from adjacent functional blocks during high-speed operation. The proposed ADC occupies an active die area of $0.70mm^2$, based on various process-insensitive layout techniques to minimize the physical process imperfection effects. The prototype ADC in a 45nm CMOS demonstrates a measured DNL and INL within 0.77LSB and 1.57LSB, with a maximum SNDR and SFDR of 64.2dB and 78.4dB at 100MS/s, respectively. The ADC is implemented with long-channel devices rather than minimum channel-length devices available in this CMOS technology to process a wide input range of $2.0V_{PP}$ for the required system and to obtain a high dynamic performance at IF-domain input signal bands. The ADC consumes 425.0mW with a single analog voltage of 2.5V and two digital voltages of 2.5V and 1.1V.

• Clean Technology
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• v.28 no.1
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• pp.79-93
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• 2022

In this study, an electronics industrial wastewater activated sludge model (e-ASM) to be used as a Water Digital Twin was calibrated based on real high-tech electronics industrial wastewater treatment measurements from lab-scale and pilot-scale reactors, and examined for its treatment performance, effluent quality prediction, and optimal process selection. For specialized modeling of a high-tech electronics industrial wastewater treatment system, the kinetic parameters of the e-ASM were identified by a sensitivity analysis and calibrated by the multiple response surface method (MRS). The calibrated e-ASM showed a high compatibility of more than 90% with the experimental data from the lab-scale and pilot-scale processes. Four electronics industrial wastewater treatment processes-MLE, A2/O, 4-stage MLE-MBR, and Bardenpo-MBR-were implemented with the proposed Water Digital Twin to compare their removal efficiencies according to various electronics industrial wastewater characteristics. Bardenpo-MBR stably removed more than 90% of the chemical oxygen demand (COD) and showed the highest nitrogen removal efficiency. Furthermore, a high concentration of 1,800 mg L^-1 T MAH influent could be 98% removed when the HRT of the Bardenpho-MBR process was more than 3 days. Hence, it is expected that the e-ASM in this study can be used as a Water Digital Twin platform with high compatibility in a variety of situations, including plant optimization, Water AI, and the selection of best available technology (BAT) for a sustainable high-tech electronics industry.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.2C
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• pp.184-190
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• 2002

This paper compares and analyzes and analyzes the transmission performance of the OpenCable system and the DBD-C system which are adopted as the digital CATV transmission standard in U.S.A. and Europe respectively through computer simulation under the same channel environment. We considered the channel environment including the random noise and the CTB (Composite Tripple Beats) noise as channel impairments in order to compare the two standard fairly. Additionally, we analyzed the transmission performance of the OpenCable system for the various interleaving depths. We implemented each transmission system by software, and we analyzed BER values with respect to the C/N in order to compare their transmission performance. As a result of the computer simulation, to get the BER of ${10}^{-6}$ the OpenCable system requires 1.2 dB kiwer C/N than the DVB-C system in the 64-QAM mode, and the two system require similar C/N in the 256-QAM mode.

• Journal of IKEEE
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• v.13 no.1
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• pp.41-48
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• 2009

This paper describes an implementation of the analog front end (AFE) incorporated with the image signal processing (ISP) unit in the SoC, dominating the performance of the CCD image sensor system. New schemes are exploited in the high-frequency sampling to reduce the sampling uncertainty apparently as the frequency increases, in the structure for the wide-range variable gain amplifier (VGA) capable of $0{\sim}36\;dB$ exponential gain control to meet the needed bandwidth and accuracy by adopting a new parasitic insensitive capacitor array. Moreover, the double cancellation of the black-level noise was efficiently achieved both in the analog and the digital domain. The proposed topology fabricated in a $0.35-{\mu}m$ CMOS process was proved in a full CCD camera system of 10-bit accuracy, dissipating 80 mA at 15 MHz with a 3.3 V supply voltage.

• 프린팅코리아
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• s.3
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• pp.146-147
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• 2002

21세기 지식정보화 시대의 도래에 대비하여 출판 및 인쇄산업을 지식산업의 중심기반으로 육성.진흥하기 위하여 그동안 의원입법(심재권의원 대표발의, 의원32명 공동발의)으로 추진해 오던 "출판 및 인쇄진흥법"이 7월 31일 국회 본회의를 통과했다. 5장 27조로 구성된 동 법률은 현행 출판인쇄 관련 법령인 '출판사 및 인쇄소의 등록 등에 관한법률'과 '외국 간행물 수입배포에 관한법률'을 통합하여, 문화산업의 핵심기반 콘텐츠인 출판 및 인쇄산업의 미래지향적이고 종합적인 진흥을 목적으로 제정되었으며, 법률 시행령 제정 등 후속 절차를 거쳐 공포 6개월 후에 시행될 예정이다. 이 법률의 주요골자는 첫째, 문화관광부장관이 출판 및 인쇄문화산업 지원 육성을 위한 진흥시책을 매 3년마다 수립.시행하도록 했다. 둘째, 출판사 및 인쇄사의 등록제를 신고제로 전환하며, 외국 간행물 수입추천을 받고자 하는 자의 수수료 납부 규정을 삭제하는 한편, 외국 간행물 수입관련 벌칙규정을 형벌에서 과태료로 대폭 완화하는 등 규제를 완화했다. 셋째, 출판의 형태가 점차 디지털 방식으로 변화하는 시대적 추세에 발맞춰 이에 대한 제도적인 체제를 초기에 정립하여 전자출판사업을 육성하고자 전자출판물에 관한 개념규정을 신설하였다. 넷째, 위기에 처한 출판.서점업계를 살리기 위해 지난 77년부터 시행되어 왔으나 최근 위기에 봉착한 도서정가제를 규정함에 있어 공정거래위원장이 문화관광부장관과 협의하여 지정하는 발행된지 1년 이내의 도서에 한하여 정가판매를 의무화 하였으며, 동 규정의 적용시한을 5년간으로 하되, 이를 어긴 사람에게는 과태료를 부과하게 하여 시행에 있어서는 좀더 강제성을 가지도록 하였다. 다섯째, 현행 '청소년보호법' 상에 있던 한국간행물윤리위원회의 설치.운영근거를 이 법으로 이관하여 동 위원회가 사실상 문화광광부에 속해있는 점을 감안, 형식과 내용이 일치되도록 하였다. 여섯째, 불법복제간행물 및 유해간행물에 대하여는 관할 행정관청이 수거.폐기를 명할 수 있고, 이에 불응할 경우에는 직접 수거.페기할 수 있도록 하였다. 일곱째, 이 법의 제정에 따라 '출판사 및 인쇄소의 등록에 관한법률'과 '외국간행물 수입배포에 관한법률'은 폐지하도록 하였다. 한편 이번 동법 제정으로 21세기 지식정보시대에 문화산업의 핵심기반이 되는 출판인쇄산업의 발전에 있어 출판인쇄산업의 중흥과 건전한 출판유통의 질서확립 등 새로운 이정표를 제시한 것으로 평가되고 있다. 다음은 동법률 중 인쇄와 관련된 조항을 요약, 소개한다.