• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.46 no.8
• /
• pp.22-30
• /
• 2009

Due to high levels of integration and complexity, the Network-on-Chip (NoC) approach has emerged as a new design paradigm to overcome on-chip communication issues and data bandwidth limits in conventional SoC(System-on-Chip) design. In particular, exponentially growing of energy consumption caused by high frequency, synchronization and distributing a single global clock signal throughout the chip have become major design bottlenecks. To deal with these issues, a globally asynchronous, locally synchronous (GALS) design combined with low power techniques is considered. Such a design style fits nicely with the concept of voltage-frequency-islands (VFI) which has been recently introduced for achieving fine-grain system-level power management. In this paper, we propose an efficient design methodology that minimizes energy consumption by VFI partitioning on an NoC architecture as well as assigning supply and threshold voltage levels to each VFI. The proposed algorithm which find VFI and appropriate core (or processing element) supply voltage consists of traffic-aware core graph partitioning, communication contention delay-aware tile mapping, power variation-aware core dynamic voltage scaling (DVS), power efficient VFI merging and voltage update on the VFIs Simulation results show that average 10.3% improvement in energy consumption compared to other existing works.

• Journal of the Earthquake Engineering Society of Korea
• /
• v.9 no.2 s.42
• /
• pp.7-15
• /
• 2005

Numerical analysis model is proposed to predict the dynamic behavior of a single-degree-of-freedom structure that is equipped with hybrid base isolation system. Hybrid base isolation system is composed of friction pendulum systems (FPS) and a magnetorheological (MR) damper. A neuro-fuzzy model is used to represent dynamic behavior of the MR damper. Fuzzy model of the MR damper is trained by ANFIS (Adaptive Neuro-Fuzzy Inference System) using various displacement, velocity, and voltage combinations that are obtained from a series of performance tests. Modelling of the FPS is carried out with a nonlinear analytical equation that is derived in this study and neuro-fuzzy training. Fuzzy logic controller is employed to control the command voltage that is sent to MR damper. The dynamic responses of experimental structure subjected to various earthquake excitations are compared with numerically simulated results using neuro-fuzzy modeling method. Numerical simulation using neuro-fuzzy models of the MR damper and FPS predict response of the hybrid base isolation system very well.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.22 no.4
• /
• pp.93-99
• /
• 2008

Portable devices generally have limited energy sources, so there is a need to minimize the power consumption of processor using energy conservation methods. One of the most common energy conservation methods is dynamic voltage scaling (DVS). In this paper, we propose a new DVS algorithm which uses workload of application to determine frequency and voltage of processors. The posed DVS algorithm consists of DVS module in kernel and specified function in application. The DVS module monitors the processor utilization and changes frequency and voltage periodically. The other part monitors workload of application. With these two procedures, the processor can change the performance level to meet their deadline while consuming less energy. We implemented the proposed DVS algorithm on PXA270 processor with Linux 2.6 kernel.

• KIPS Transactions on Computer and Communication Systems
• /
• v.2 no.8
• /
• pp.343-348
• /
• 2013

We proposes a power-aware fixed-priority real-time scheduling algorithm for multimedia service, called static voltage scaling algorithm with multi-granularity resource reservation (STATIC-MULTIRSV). The multi-granularity resource reservation was introduced to deliver higher system utilization and better temporal isolation than the traditional approaches in [2]. Based on this, our STATIC-MULTIRSV is designed to reduce the power consumptions while guaranteeing that all I-frames of each video stream meet their deadlines. We implemented the proposed algorithm on top of ChronOS Real-time Linux [6]. We experimentally compared STATIC-MULTIRSV with other existing methods which showed that STATIC-MULTIRSV reduce power consumption by maximum 15% compared to its experimental counterparts.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.2 no.4
• /
• pp.28-35
• /
• 1997

본 논문에서는 송전선로에 직렬로 삽입되어 선로의 리액턴스를 동적으로 보상하는 인버터식 직렬보상기에 대한 동적 응동 해석을 기술하고 있다. 이 직렬보상기는 다중펄스로 동작하는 전압원인버터와 결합변압기, 그리고 제어장치로 구성되어 있으며, 점호각을 조절하여 선로의 리액턴스를 가변하고 용량성 뿐만 아니라 유도성 보상도 가능하다. 이 보상기로 선로의 리액턴스를 감소시키면 전송 유효전력의 증각가 가능한데, 이러한 효과를 본 논문에서는 단일기-무한대-버스 전력계통에 대해 EMTP를 이용한 시뮬레션으로 확인하였으며, 또한 축소모형 제작과 실험을 통해 실험적으로 확인하였다.

• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.20 no.12
• /
• pp.2401-2409
• /
• 2016

Android CPU governors exploit the DVFS (Dynamic Voltage Frequency Scaling) technique. The DVFS is a power management technique where the CPU operating frequency is decreased to allow a corresponding reduction in the CPU supply voltage. The power consumed by a CPU is approximately proportional to the square of the CPU supply voltage. Therefore, lower CPU operating frequency allows the CPU supply voltage to be lowered. This helps to reduce the CPU power consumption. However, lower CPU operating frequency increases a task's execution time. Such an increase in the task's execution time makes the task's response time longer and makes the task's deadline miss occur. This finally leads to degrading the quality of service provided by the task. In this paper, we evaluated the performance of Android CPU governors in terms of the power consumption, tasks's response time and deadline miss ratio.

• KIISE Transactions on Computing Practices
• /
• v.20 no.11
• /
• pp.604-609
• /
• 2014

Decoding processes in portable media players have a high computational cost, resulting in high power consumption by the CPU. If decoding computations are reduced, the power consumed by the CPU is also be reduced, but such a choice generally results in a degradation of the video quality for the users, so it is essential to address this tradeoff. We proposed a new CPU power management scheme that can make use of the scalability property available in the H.164/SVC standard. We first proposed a new video quality model that makes use of a video quality metric(VQM) in order to efficiently take into account the different quantization factors in the SVC. We then propose a new dynamic voltage scaling(DVS) scheme that can selectively combine the previous decoding times and frame sizes in order to accurately predict the next decoding time. We then implemented a scheme on a commercial smartphone and performed a user test in order to examine how users react to the VQM difference. Real measurements show that the proposed scheme uses up to 34% fewer energy than the Linux DVFS governor, and user tests confirm that the degradation in the quality is quite tolerable.

• Progress in Medical Physics
• /
• v.9 no.2
• /
• pp.95-104
• /
• 1998

The dynamic properties of the 3rd-order neuron of the retina was investigated by using conventional intracellular recording techniques. Experiments were performed in the superfused retina-eyecup preparation of the channel catfish, Ictalurus punctatus. The cornea, iris, lens, and vitreous were removed by absorption with Kimwipe tissue under the dissection microscope thereby exposing the retina in a hemi -eyecup. The electrical signal was amplified by electrometer, viewed on oscilloscope. Regular signals from the cells were recorded on a penwriter and stored by data recorder and computer. Full-field, spot or annular light stimuli were generated on a computer monitor and focused onto the retina. Baclofen hyperpolarized the dark membrane potential, suppressed sustained component and enhanced transient component of the ON-sustained cell with a large transient component, but did not affect the surround antagonism of the cell. Baclofen selectively suppressed responses evoked by moving bar light stimuli on the ON-OFF transient cell. The results suggest that transient cells have directional selectivity in the inner retina. These dynamic properties of amacrine and ganglion cells were modulated by baclofen. Therefore, it is presumed that there is baclofen-induced directional selectivity in ON-OFF transient cells in the catfish retina.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.7 no.5
• /
• pp.866-874
• /
• 2006

This paper proposes a new Dynamic Voltage Scaling(DVS) algorithm to achieve low-power scheduling of aperiodic hard real-time tasks. Aperiodic tasks schedulingcannot be applied to the conventional DVS algorithm and result in consuming energy more than periodic tasks because they have no period, non predictable worst case execution time, and release time. In this paper, we defined Virtual Periodic Task Set(VTS) which has constant period and worst case execution time, and released aperiodic tasks are assigned to this VTS. The period and worst case execution time of the virtual task can be obtained by calculating task utilization rate of both periodic and aperiodic tasks. The proposed DVS algorithm scales the frequency of both periodic and aperiodic tasks in VTS. Simulation results show that the energy consumption of the proposed algorithm is reduced by 11% over the conventional DVS algorithm for only periodic task.

• Proceedings of the IEEK Conference
• /
• 2003.07d
• /
• pp.1379-1382
• /
• 2003

Recently, mobile embedded systems used widly in various applications. Managing power consumption is becoming a matter of primary concern because those systems use limited power supply. As an approach reduce power consumption, voltage can be scaled down. according to the execution time and deadline. By reducing the supplying voltage to 1/N power consumption can be reduced to 1/N. DPM-S is a well known method for dynamic voltage scaling. In this paper, we enhanced DPM-S by using average execution time aggressively. The frequency of processor is calculated based in average execution time instead of worst case execution time. Simulation results show that our method achieve up to 5％ energy savings than DPM-S.