• 한국HCI학회:학술대회논문집
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• 2007.02a
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• pp.274-280
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• 2007

오디오 텍스처 합성은 주어진 짧은 오디오 클립으로부터 임의의 길이를 갖는 새로운 오디오 클립을 생성하는 방법이다. 이는 애니메이션이나 영화에서 비디오와 정확한 동기화를 이루는 사운드 효과를, 혹은 임의의 길이를 갖는 배경 음악을 효율적으로 만들 수 있는 방법이다. 최근 Lie Lu는 주어진 예제 오디오 클립을 여러 조각으로 나눈 후, 이 조각들을 그래프 형태로 연결하고, 생성된 그래프를 탐색하면서 임의의 길이를 가지는 오디오 클립을 합성하는 방법을 제안하였다. 비교적 간단한 방법으로도 원본 오디오 클립과 비슷한 느낌의 오디오 클립을 만들어낸다는 장점이 있지만, 이는 원본 내의 여러 오디오 조각들이 단지 지속적으로 연결되는 형태로 합성되기 때문에 종종 반복되는 느낌을 받는다는 단점이 있다. 본 논문에서는 Lie Lu의 방법과는 달리 주어진 예제 오디오 클립을 직접 합성함으로써 반복성을 줄이면서도 원본과 비슷한 느낌을 갖는 결과 오디오 클립을 생성할 수 있는 방법을 제안한다. 특히 본 논문에서는 정확한 합성을 위하여 EM 최적화 방법을 사용한다. 본 논문에서 제안하는 합성 방법은 먼저 예제 오디오 클립을 일정 단위로 나누고 이렇게 나눠진 부분들을 일정 길이만큼 서로 겹쳐지게 합성하여 임의의 길이의 오디오 클립을 만든다. 그 후 만들어진 오디오 클립을 예제 오디오 클립과 부분 부분을 비교하여 확장된 오디오 클립과 최대한 비슷한 부분을 예제 오디오 클립에서 찾는다. 그 다음 찾아진 결과를 결과 오디오에 다시 합성하여 오디오 클립을 만든다. 이런 과정을 반복하여 최적화된 가장 적절한 결과값을 구한다. 이 결과는 분할된 부분들이 가장 자연스럽게 이어지는 결과가 된다. 본 논문에서는 최적화를 사용하여 오디오를 합성하기 때문에 합성 결과를 쉽게 조정할 수 있다는 장점이 있다. 최적화 문제에 특정 제약 조건을 넣음으로써 사용자가 원하는 부분의 음악이 결과 사운드의 특정 부분에 위치 할 수 있게 하고 이로써 특정 흐름을 만들어낼 수 있으며, 일부가 손실된 사운드 데이터의 복구를 가능하게 하는 등의 결과를 생성할 수 있다. EM 최적화를 사용한 오디오 텍스처 합성 방법은 기존의 합성 방법에 비해 질적인 측면에서 보다 좋은 결과를 생성할 수 있고, 비교적 반복이 덜한 패턴들을 만들어 낼 수 있다. 이를 입증하기 위해 이에 대한 사용자 설문 조사 결과가 제시된다.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.4
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• pp.767-773
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• 2000

As computer systems and communication technologies develop rapidly, CSCW(Computer Supported Collaborative Work) system appears nowadays, through which it is available to work on virtual space without any restriction of time and place. Most of CWCS systems depend on a special network and groupware. The systems of graphics and CAD are not so many because they are specified by hardware and application software. In this paper, we propose a web-based collaborative CAD system, which can be jointly worked on Internet WWW being independent from any platforms. It can create and modify 3D objects easily using VRML and Java 3D API, and it can send, print, and store them. The interactive work for designing objects can be also carried out through chatting with each other. This system is executed in the environment of Client/server architecture. Clients connect to the CAD sewer through Java applet on WWW. The server is implemented by Java application, and it consists of three components : connection manager which controls the contact to users, work manager which keeps viewing in concurrency and provides virtual work space sharing with others, and solid modeler which creates 3D object.

• The Transactions of the Korea Information Processing Society
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• v.6 no.12
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• pp.3652-3661
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• 1999

To support multimedia applications such as a multimedia communication systems and multimedia broadcasting, an operating system need to predict their timing-constraints. So, In this real-time systems, we must solve the priority inversion problem that may make the behavior of unpredictable systems and need a real-time server model that provides a better preemptability and minimizes a system overhead. In current real-time systems, the single thread server model, the worker model and the dynamic server model are being used for synchronization but they cannot propose an effective structure for managing shared resources. In this paper, the priority inheritance protocol is used to solve the priority inversion problem and the hybrid prioritized worker model is proposed, which can provide a more effective structure and a faster response time minimizing a system overhead. The hybrid prioritized worker model is to combine the static and the dynamic prioritized worker model, and have a better performance than other models in response time which is an important factor in a real-time system.

• Journal of KIISE:Computer Systems and Theory
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• v.26 no.7
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• pp.847-862
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• 1999

본 논문에서는 유한버퍼의(finite-buffered) 동기화된(synchronous) 큐잉모델(queueing model)을 이용하여 명령어들간의 병렬성, 분기명령의 빈도수, 분기예측(branch prediction)의 정확도, 캐쉬미스 등의 파라미터들을 고려하여 프로세서의 명령어 실행율을 예측하며 캐쉬의 성능과 파이프라인 성능간의 관계를 분석할 수 있는 새로운 해석적 모델을 제안하였다. 해석적 모델은 모델의 타당성을 검증하기 위해서 시뮬레이션을 수행하여 얻은 결과와 비교하였다. 해석적 모델과 시뮬레이션을 비교한 결과 대부분 10% 오차 내에서 일치하였다. 본 연구를 통하여 얻은 해석적 모델을 사용하면 시뮬레이션에서는 드러나지 않는 성능제약의 원인에 대한 명확한 규명이 가능하기 때문에 성능향상을 위한 설계자료를 얻을 수 있으며, 시스템 성능 밸런스를 위한 캐쉬와 비순차이슈 파이프라인 성능간의 관계에 대한 정확한 분석이 가능하다.Abstract This research presents a novel analytic model to predict the instruction execution rate of superscalar processors using the queuing model with finite-buffer size and synchronous operation mode. The proposed model is also able to analyze the performance relationship between cache and pipeline. The proposed model takes into account various kinds of architectural parameters such as instruction-level parallelism, branch probability, the accuracy of branch prediction, cache miss, and etc.. To prove the correctness of the model, we performed extensive simulations and compared the results with the analytic model. Simulation results showed that the proposed model can estimate the average execution rate accurately within 10% error compared to simulation results. The proposed model can explain the causes of performance bottleneck which cannot be uncovered by the simulation method only. The model is also able to show the effect of the cache miss on the performance of out-of-order issue superscalar processors, which can provide an valuable information in designing a balanced system.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37 no.1C
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• pp.24-33
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• 2012

Recently, the ultra-lightweight authentication RFID protocol that can actually implement on the RFID Tag is one among authentication protocols getting a concern, but recently many problems were clarified of the feature becase of the protocol which doesn't use the security algorithm. In this paper, we analyzed the problem of the ultra-lightweight authentication protocols and propose the design of ultra-lightweight RFID authentic ation protocols improving the index processing techniques. Because of improving the index processing technique in the method sending the Server authentication message to the authenticated tag, the proposed protocol is strong against the active attack which Li presents. Besides, the proposed protocol has the buffer storage of the keys and index and is strong against the asynchronous attack.

• Information Systems Review
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• v.24 no.4
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• pp.119-142
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• 2022

Organizations are attempting a digital transformation that converts physical business processing into virtual business processing. Through this digital transformation, organizations are overcoming time and space constraints and creating competitiveness. The digital transformation of this work environment has been accelerated as many organizations have implemented remote work due to the recent COVID-19 pandemic. This study focused on business process virtualizability, which is the result of the rapid digital transformation of the work environment. Business process virtualizability is the resulting quality, such as the suitability or excellence of business processing in a virtual environment. This research model is the effect of process, IT and organizational characteristics on business process virtualizability. As a result of the verification of people who have experienced remote work in a virtual environment, first, it was confirmed that, in terms of process characteristics, sensory requirements affect business process virtualizability, but relationship requirements, synchronism requirements, and identification and control requirements do not. Second, in terms of IT characteristics, it was confirmed that representation and reach affect business process virtualizability. Third, it was confirmed that, in terms of organizational characteristics, job autonomy affects business process virtualizability, but evaluation unfairness does not. This study found that representation and reach of IT had the most significant influence on business process virtualizability, job autonomy was next, and sensory requirements had the lowest influence. This presents practical implications for organizations to increase the success potential of business process virtualizability.

• Journal of the Korean Institute of Telematics and Electronics B
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• v.31B no.11
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• pp.45-52
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• 1994

In recent days low cost, high performance microprocessors have led to construction of medium scale shared memory multiprocessor systems with shared bus. Such multiprocessor systems are heavily influenced by the structures of memory systems and memory systems become more important factor in design space as microprocessors are getting faster. Even though local cache memories are very common for such systems, the latency on access to the shared memory limits throughput and scalability. There have been many researches on the memory structure for multiprocessor systems. In this paper, an asynchronous memory architecture is proposed to utilize the bandwith of system bus effectively as well as to provide flexibility of implementation. The effect of the proposed architecture if shown by simulation. We choose, as our model of the shared bus is HiPi+Bus which is designed by ETRI to meet the requirements of the High-Speed Midrange Computer System. The simulation is done by using Verilog hardware decription language. With this simulation, it is explored that the proposed asynchronous memory architecture keeps the utilization of system bus low enough to provide better throughput and scalibility. The implementation trade-offs are also described in this paper. The asynchronous memory is implemented and tested under the prototype testing environment by using test program. This intensive test has validated the operation of the proposed architecture.

• Journal of the Korea Computer Industry Society
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• v.2 no.3
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• pp.329-340
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• 2001

Video server which stores video streams should serve more users with the requested streams rapidly, satisfying their time constraints. For this objective, the storage system of the video server needs large disk bandwidth and buffer capacity. But, because given disk bandwidth and buffer capacity are limited, technologies that utilize effectively the given disk bandwidth and buffer capacity without waste might be needed. In this paper, we propose the policies that not only reduce the startup latency but also, support more users by utilizing the disk bandwidth and buffer efficiently, which also considering time constraint characteristics of video stream. In order to reduce the startup latency of the service requests, it inducts the effect of random access of disk head by moving asynchronously disk heads in multiple disk environments. Also, there are two technologies to support more users. First, the proposed policy reduces the seek latency by moving the disk head sequentially so that it saves the disk bandwidth. Second, it determines the segment size through considering both given buffer capacity and given disk bandwidth by heuristic approach in order to overcome the constraints of the number of streams supported due to limitation of buffer capacity. The segment size makes it utilize given buffer optimally with given disk bandwidth. The correctness of the proposed policies is not only analyzed theoretically but also evaluated through simulations.

• Journal of The Korean Society of Inherited Metabolic disease
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• v.13 no.1
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• pp.62-68
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• 2013

우리나라의 경우 희귀질환은 국내 유병인구가 2만명 이하로 드물게 나타나는 질환으로 적절한치료 방법과 대체의약품이 개발되지 않은 병을 말한다. 희귀의약품은 대상 환자 수가 적어 연구개발이 어렵고 시장에서 수익성을 기대하기 어려워 제약기업이 쉽게 개발할 동기를 갖기 어렵기 때문에 선진국에서는 희귀의약품의 개발을 촉진하기 위한 제도를 운영하고 있다. 국내에서도 희귀질환자들에게 치료기회를 확대 제공하기 위한 일환으로, 1999년 정부의 적극적인 지원하에 한국희귀의약품센터가 설립되었다. 한국희귀의약품센터는 적용대상이 드물고 대체의약품이 없어 긴급한 도입이 요구되는 의약품 및 희귀질환자 치료용 약품의 구입공급과 제반 정보의 수집 및 제공을 함으로써 국민의 건강증진에 기여하고 있다. 한국희귀의약품센터의 주요 역할은 희귀의약품 및 희귀질환에 대한 최신정보를 수집 분류 데이터베이스화하여 이를 희귀의약품의 수요자 및 공급자 등 필요로 하는 자에게 제공하고 있으며, 특히 적용 대상이 드물고 대체의약품이 없어 긴급하게 도입할 필요가 있는 의약품 및 희귀질환자 치료용 의약품에 대하여 자가 치료용 의약품의 수입추천 안내 및 수입대행, 희귀의약품의 지정추천업무 등을 수행하고 있다. 희귀의약품 지정에 관한 규정은 1998년 4월 16일에 식품의약품 안전처에서 고시하였으며 2013년 2월에 식약처에서 고시 제 2013-8호로 개정하였다. 개정 이유는 지속적인 투자, 연구 개발이 필요한 희귀의 약품의 개발을 활성화하고 지정 한도액을 상향하는 등 희귀의약품 지정제도 개선하고자 하는 것이다. 이번 개정의 주요 내용은 개발 초기부터 '개발단계 희귀의약품' 지정하고 지정 갱신을 위해 별도 생산(수입)실적 보고를 폐지하며, 위탁제조판매업자의 희귀의약품 지정 신청을 가능하게 하고, 유병인구 500명 이하인 경우 지정한도 금액 상향 등이다. 이번 개정을 통해 희귀의약품에 대한 연구 개발이 더욱 확대 될 것으로 기대하며, 앞으로도 희귀질환 환자들에게 원활하게 희귀의약품이 공급되도록 지원 정책이 추진되어야 할 것이다.

• Journal of KIISE:Information Networking
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• v.29 no.3
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• pp.277-285
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• 2002

This paper proposes and analyzes an error control scheme for the transmission control based real-time communication, such as FDDI, TDMA, and wireless LAN, which delivers the message according to the round robin fashion after the off-line bandwidth allocation. Taking into account the time constraint of each message, the proposed error control scheme makes the receiver transmit the error report via asynchronous traffic while the sender resend the requested message via overallocated access time which is inevitably introduced by the bandwidth allocation procedure for hard real -time guarantee. The error control procedure does not interfere other real -time message transmissions. In addition, as each frame contains the size of the message it belongs, the receiver can recognize the end of completion of message transmission. This enables earlier error report to the receiver so that the sender can cope with more network errors. The analysis results along with simulation performed via SMPL show that the proposed scheme is able to enhance the deadline meet ratio of messages by overcoming the network errors. Using the proposed error control scheme, the hard real -time network can be built at cost lower than, but performance comparable to the expensive dual link network.