• 제목/요약/키워드: 고조파 보상

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Design of Push-Push Oscillator Improving Coupling Characteristics of Resonators (공진기의 결합 특성을 개선한 Push-Push 발진기 설계)

  • Do, Ji-Hoon;Kim, Dae-Ung;Kim, Dae-Hui;Yun, Ho-Seok;Kang, Dong-Jin;Hong, Ui-Seok
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.18 no.3 s.118
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    • pp.241-247
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    • 2007
  • This paper introduces a new type push-push harmonic dielectric resonator oscillator. Proposed oscillators are utilized by HDRO(Harmonic Dielectric Resonator Oscillator) which are combined in push-push structure. As a result, fundamental signal suppression ratio and output power of harmonic signal has been improved. The increase of phase noise is compensated by improving coupling characteristic between resonator and parallel microstrip line. The proposed push-push HDRO shows the output power of 9.32 dBm, the fundamental signal suppression of -47.2 dBc and phase noise of -99.86 dBc at 100 kHz offset frequency and 18.7 GHz center frequency.

Characteristics Analysis for Voltage, Current & Capacity of Condenser at Voltage Unbalance (전압 불평형시 콘덴서 전압, 전류, 용량 특성 해석)

  • Kim, Jong-Gyeum;Park, Young-Jeen
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.24 no.5
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    • pp.145-151
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    • 2010
  • Voltage unbalance is regarded as a power quality problem of significant at the user application. Although the voltages are quite well balanced at the transmission system, the voltage level of utilization can be unbalanced due to the unequal system impedances and the unequal distribution of single phase loads. Capacitor is generally used for power-factor compensation and reducing harmonics of non linear load with reactor. If voltage unbalance exists, current unbalance is generated and it will be reflected in the capacity variance. When the reactor and condenser are used at the same location, generally its trouble rate is high. And it is very important checking out that how the variance of voltage, current and capacity of condenser is proceeded by the voltage unbalance. In this paper, we calculated that voltage, current and capacity of condenser are within the tolerance limit of official regulations in the event of voltage unbalance with/without reactor.

A Study on the Algorithm for Multi-Functional Protection Devices in Distribution Systems with New Energy Sources (신 에너지전원이 연계된 배전계통의 통합 보호기기의 알고리즘 개발에 관한 연구)

  • Yoon, Gi-Gab;Kang, Dae-Hoon;Rho, Dae-Seok
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.9
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    • pp.2253-2260
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    • 2009
  • The typical distribution systems have the power flow from distribution substations (sources) to customers (load) only as one direction. However, in the case where new energy power sources are connected to distribution systems, the output variations of new energy sources to distribution systems, which is so called reverse power flow, may cause the bi-directional power flow. So, the reverse power flow has severe impacts on typical power system, for example power quality problems, protection coordination problems, and so on. Therefore, this paper proposes the algorithm for Multi-functional protection devices in distribution systems in the case where new energy sources are interconnected. The proposed algorithm is verified to show the effectiveness by simulating and experimenting the prototype systems.

A Robust Harmonic Compensation Technique using Digital Lock-in Amplifier under the Non-Sinusoidal Grid Voltage Conditions for the Single Phase Grid Connected Inverters (디지털 록인 앰프를 이용한 비정현 계통 전압 하에서 강인한 단상계통 연계 인 버터용 고조파 보상법)

  • Khan, Reyyan Ahmad;Ashraf, Muhammad Noman;Choi, Woojin
    • Proceedings of the KIPE Conference
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    • 2018.11a
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    • pp.95-97
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    • 2018
  • The power quality of Single Phase Grid-Connected Inverters (GCIs) has received much attention with the increasing number of Distributed Generation (DG) systems. However, the performance of single phase GCIs get degraded due to several factors such as the grid voltage harmonics, the dead time effect, and the turn ON/OFF of the switches, which causes the harmonics at the output of GCIs. Therefore, it is not easy to satisfy the harmonic standards such as IEEE 519 and P1547 without the help of harmonic compensator. To meet the harmonic standards a certain kind of harmonic controller needs to be added to the current control loop to effectively mitigate the low order harmonics. In this paper, the harmonic compensation is performed using a novel robust harmonic compensation method based on Digital Lock-in Amplifier (DLA). In the proposed technique, DLAs are used to extract the amplitude and phase information of the harmonics from the output current and compensate it by using a simple PI controller in the feedforward manner. In order to show the superior performance of the proposed harmonic compensation technique, it is compared with those of conventional harmonic compensation methods in terms of the effectiveness of harmonic elimination, complexity, and implementation. The validity of the proposed harmonic compensation techniques for the single phase GCIs is verified through the experimental results with a 5kW single phase GCI. Index Terms -Single Phase Grid Connected Inverter (SPGCI), Harmonic Compensation Method, Total Harmonic Distortion (THD) and Harmonic Standard.

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A Study on the Pitch Extraction Improvement Using LSP for the Synthesis of High Speech Quality (고음질 음성합성을 위한 LSP를 이용한 피치검출 성능향상에 관한 연구)

  • Seo, Ji-Ho;Kim, Jong-Kuk;Bae, Myung-Jin
    • The Journal of the Acoustical Society of Korea
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    • v.29 no.1
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    • pp.69-75
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    • 2010
  • In this paper, the pitch is detected after the elimination of formant ingredients by flattening the spectrum in frequency domain. In order to remove impact of formant and transition frequency in the signal spectrum, formant envelop is made by linear interpolation with any points each sub-band and the spectrum of speech signal is compensated by the reverse of the envelop interpolated linearly after we divide frequency band into several segment based on LSP and detect the points. The experimental result showed the proposed method appeared an outstanding performance in compared with LPC, Cepstrum, Lifter methods. The method reduced the gross error rate 1.30% than the LPC method which appeared a good performance except the proposed method. Also, the proposed method showed low error rate in noise environment.

Group Delay Time Matched CMOS Microwave Frequency Doubler (군지연 시간 정합 CMOS 마이크로파 주파수 체배기)

  • Song, Kyung-Ju;Kim, Seung-Gyun;Choi, Heung-Jae;Jeong, Yong-Chae
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.19 no.7
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    • pp.771-777
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    • 2008
  • In this paper, a frequency doubler using modified time-delay technique is proposed. A voltage controlled delay line (VCDL) in the proposed frequency doubler compensates the group delay time mismatching between input and delayed signal. With the group delay time matching and waveform shaping using the adjustable Schmitt triggers, the unwanted fundamental component($f_0$) and the higher order harmonics such as third and fourth are diminished excellently. In result, only the doubled frequency component($2f_0$) appears dominantly at the output port. The frequency doubler is designed at 1.15 GHz of $f_0$ and fabricated with TSMC $0.18\;{\mu}m$ CMOS process. The measured output power at $2f_0$ is 2.67 dBm when the input power is 0 dBm. The obtained suppression ratio of $f_0,\;3f_0$, and $4f_0$ to $2f_0$ are 43.65, 38.65 and 35.59 dB, respectively.