• Title/Summary/Keyword: 고장점 표정

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Fault Location Algorithm for Parallel Transmission Line with a Teed Circuit (1회선 분기점을 갖는 병행 2회선 송전선로의 고장점 표정 알고리즘)

  • Kwon, Tae-Won;Kang, Sang-Hee;Choi, Myeon-Song;Lee, Seung-Jae
    • Proceedings of the KIEE Conference
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    • 1999.11b
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    • pp.116-118
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    • 1999
  • A fault location algorithm that is suitable for parallel transmission line which contains a teed circuit is presented. The method uses only the local end voltage and current signals. Zero sequence currents of other lines are calculated by distribution factors, and distance equations are solved by recursive calculation.

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Fault Location Algorithm for Parallel Transmission Line with a Teed Circuit (병행 2회선의 T분기 선로 고장점 표정 알고리즘)

  • Kwon, Young-Jin;Kang, Sang-Hee;Lee, Seeng-Jae
    • Proceedings of the KIEE Conference
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    • 2000.11a
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    • pp.49-51
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    • 2000
  • This paper presents a fault location algorithm for single-phase-to-ground faults on the teed circuit of a parallel transmission line. This algorithm uses only local end voltage and current information. Remote end and fault currents are calculated by using distribution factors. To reduce load current effect, negative sequence current is used. EMTP simulation result have shown effectiveness of the algorithm under various conditions.

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Analysis of the operation of Fault Locator in aspect of Line Constants by unifying Protect Wires (보호선 통합에 따른 선로정수 측면의 고장점 표정장치 동작에 관한 해석)

  • Lee, H.M.;Chang, S.H.;Han, M.S.
    • Proceedings of the KIEE Conference
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    • 2004.04a
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    • pp.275-277
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    • 2004
  • when a fault occurs, we need the fault locator to find out the location of the fault quickly. The fault locator can find out the exact location of the fault through the line constants of the catenary system. If the configuration of the catenary system is modified, the line constants is also changed. Therefore, this paper analyzes the error of the operation of the fault locator by the simulation.

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A Fast Fault Location Method Using Modal Decomposition Technique of Traveling Wave (진행파 모드 분해 기법을 이용한 고속 고장점 표정)

  • Hong, Jun-Hee;Cho, Kyung-Rae;Kim, Sung-Soo;Park, Jong-Keun
    • Proceedings of the KIEE Conference
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    • 1995.11a
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    • pp.95-98
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    • 1995
  • In this paper, a good fault location algorithm will be presented, which uses novel signal processing techniques and takes a new paradigm to overcome some drawbacks of the conventional methods. The main feature of the method is that it uses the high frequency components in fault signal and considers the influence of the source network by using a traveling wave concept.

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A study on the Fault Location Technique for Transmission Line System (송전선로의 고장점 표정기법에 관한 연구)

  • Kim, S.R.;Park, C.W.;Shin, M.C.
    • Proceedings of the KIEE Conference
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    • 2001.07a
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    • pp.255-257
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    • 2001
  • This paper describes an accurate fault location algorithm based on current distribution factors. To prove the effectiveness of proposed method, we used by simulation data from EMTP. The proposed algorithm using the current distribution factors is independent of fault resistance and load flow variation.

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Fault Location Algorithm using Software Fault Tolerance (Software Fault Tolerance를 이용한 송전선로의 고장점 표정 알고리즘)

  • Jang, Yong-Won;Han, Seung-Su;Kim, Won-Ha
    • Proceedings of the KIEE Conference
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    • 2003.11c
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    • pp.875-877
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    • 2003
  • This paper use fault location algorithm for single-phase-to-ground faults on the teed circuit of a parallel transmission line that use only local end voltage and current information. When Newton-Raphson iteration method is used, the Initial value may cause error or cause not suitable result. Suggested new calculation model uses NVP methodology, which is one of the fault tolerance technology to solve this problem. EMTP simulation result has shown effectiveness of the algorithm under various conditions.

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A Fault Location Algorithm for on DC Railway Systems (직류철도 급전계통 고장점표정)

  • Yang, Eon-Phil;Kang, Sang-Hee;Lee, Seung-Jae;Choi, Myeon-Song
    • Proceedings of the KIEE Conference
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    • 2002.07a
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    • pp.3-5
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    • 2002
  • If a fault occurs in the DC railway system, it is important to find fault location and to remove it immediately for prompt repair. The aim of the present paper is to locate the position of the fault by using Kirchhoff's voltage law(KVL). The DC railway system is simulated using Power System Blockset(PSB) in Matlab Toolbox.

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The Analysis of Protection -Characteristics and Fault-Locator Simulation on the Electrical Railway (교류전기철도 보호특성 해석 및 고장점표정 시뮬레이션)

  • 창상훈;이장무
    • Proceedings of the KSR Conference
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    • 1998.11a
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    • pp.262-269
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    • 1998
  • In case the fault occurs in AC power supply network, protective relaying system must selectively detect line-to-line/ground fault and immediately cut off the power flow into the fault location for guaranteeing the safety of people, electric vehicle and ground installation etc. It is the most important point in power system operation to minimize the fault duration by rapid trip scheme and accurate estimation of the fault location. In this paper, we analyze the load characteristics of each vehicle, perform the fault analysis of AC power supply network using AT current-ratio method. The result shows its usefulness.

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A Study on Digital Fault Locator for Transmission Line (송전선로용 디지털 고장점 표정장치에 관한 연구)

  • Lee, Kyung-Min;Park, Chul-Won
    • The Transactions of the Korean Institute of Electrical Engineers P
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    • v.64 no.4
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    • pp.291-296
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    • 2015
  • Transmission line is exposed to a large area, and then faults are likely to occur than the other component of power system. When a fault occurs on a transmission line, fault locator helps fast recovery of power supply on power system. This paper deals with the design of a digital fault locator for improvement accuracy of the fault distance estimation and a fault occurrence position for transmission line. The algorithm of a fault locator uses a DC offset removal filter and DFT filter. The algorithm utilizes a fault data of GPS time synchronized. The computed fault information is transmitted to the other side substation through communication. The digital fault locator includes MPU module, ADPU module, SIU module, and a power module. The MMI firmware and software of the fault locator was implemented.

A Using Study for Fault Locator Algorithm of Distribution System (배전계통 고장점 표정 알고리즘 적용 연구)

  • Lee, Sung-Woo;Ha, Bok-Nam
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.74_76
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    • 2009
  • This paper presents a discrete wavelet analysis based algorithm to address the fault impedance calculation under transient state in radial power distribution networks. The fault impedances have been derived under different fault conditions. Furthermore, a recursive fault distance estimation method is proposed utilizing the measured fault impedance and power line parameters. The proposed scheme can resolve the errors caused by the non-homogeneous power lines, the presence of lateral loads since, the fault impedance will always be updated with the recursive form. For the verification of the proposed scheme, a filed test has been peformed with varying fault resistances in the 22.9(kV) radial system. Power meters and fault locators were installed at the substation. It was figured out that the performance of the discrete wavelet and the recursive scheme are very good even for high fault resistance condition.

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