• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.2
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• pp.167-174
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• 1996

In this paper, a fault location algorithm is presented, which uses novel signal processing techniques and takes a new paradigm to overcome some drawbacks of the conventional methods. This new method for fault location on electric power transmission lines uses only one-terminal fault signals. The main feature of the method is hat it uses the high frequency components in fault signal and considers the influence of the source network by using a traveling wave propagation characteristics. As a result, we can develop a high speed, good accuracy fault locator.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.50 no.3
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• pp.146-152
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• 2001

This paper describes an accurate fault location algorithm based on sequence current distribution factors for a double-circuit transmission system. The proposed method uses the voltage and current collected at only the local end of a single-circuit. This method is virtually independent of the fault resistance and the mutual coupling effect caused by the zero-sequence current of the adjacent parallel circuit and insensitive to the variation of source impedance. The fault distance is determined by solving the forth-order KVL(Kirchhoff's Voltage Law) based distance equation. The zero-sequence current of adjacent circuit is estimated by using a zero-sequence current distribution factor and the zero-sequence current of the self-circuit. Thousands of fault simulation by EMTP have proved the accuracy and effectiveness of the proposed algorithm.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.73-74
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• 2007

For a safe operation of HVDC systems, the fault location and clearance of faults in the HVDC lines are important. Past methods for fault location on HVDC cable depend on existence of assistance cables and fault resistance, broken cable and environment of fault location. For complement these problems, in this paper, fault location method using traveling wave and cross correlation function is proposed for HVDC cables. Voltage controlled source and current controlled source HVDC were modeled by EMTDC/PSCAD. The proposed algorithm were verified varying with fault distance, fault resistance.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.57 no.8
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• pp.1311-1317
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• 2008

In this paper, a fault location algorithm using wavelet transform is proposed for HVDC cable lines. The arriving instants of the first and second fault-induced backward travelling waves can be detected by using wavelet transform. The fault distance is estimated by using the time difference between the two instants of backward travelling waves and the velocity of the travelling wave. To distinguish between the backward wave from fault point and the backward wave from the remote end, polarities of backward waves are used. The proposed algorithm is verified varying with fault distances and fault resistances in underground cables of VSC(voltage source converter) HVDC system and CSC(Current Source Converter) HVDC respectively. Performance evaluations of the proposed algorithm shows that it has good ability for a fault location of HVDC cable faults.

• Proceedings of the KIEE Conference
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• 2006.11a
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• pp.411-413
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• 2006

This paper presents a novel fault location scheme on Korean AC electric railway systems. On AC railway system, because there is a long distance, 40 km or longer, between two railway substations, a fault location technique is very important. Since the fault current flows through the catenary system, the catenary system must be modeled exactly to analyze fault current magnitude and fault location. In this paper, before suggestion for the novel scheme of fault location, a 9-conductor modeling technique that includes boost wires and impedance bonds is introduced, based on the characteristics of Korean AC electric railway. After obtaining a 9-conductor modeling, the railway system is constructed for computer simulation by using PSCAD/EMTDC. By case studies, we can verify superiority of a new fault location scheme and suggest a powerful model for fault analysis on electric railway systems.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.65 no.1
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• pp.47-52
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• 2016

Fault location identification in the transmission line is an essential part of quick service restoration for maintaining a stable in power system. The application of digital schemes to protection IEDs has led to the development of digital fault locators. Normally, the impedance measurement had been used to for the location detection of transmission line faults. It is well known that the most accurate fault location scheme uses two-ended measurements. This paper deals with the complete design of a fault locator using GPS time-synchronized phasor for transmission line fault detection. The fault location algorithm uses the transmitted relaying signals from the two-ended terminal. The fault locator hardware consists of a Main Processor Unit, Analog Digital Processor Unit, Signal Interface Unit, and Power module. In this paper, sample real-time test cases using COMTRADE format of Omicron apparatus are included. We can see that the implemented fault locator identified all the test faults.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.6
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• pp.955-961
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• 2016

Fault location estimation is an important element for rapid recovery of power system when fault occur in transmission line. In order to calculate line impedance, most of fault location algorithm uses by measuring relaying waveform using DFT. So if there is a calculation error due to the influence of phasor by DC offset component, due to large vibration by line impedance computation, abnormal and non-operation of fault locator can be issue. It is very important to implement the robust fault location algorithm that is not affected by DC offset component. This paper describes an enhanced fault location algorithm based on the DC offset elimination filter to minimize the effects of DC offset on a long transmission line. The proposed DC offset elimination filter has not need any erstwhile information. The phase angle delay of the proposed DC offset filter did not occurred and the gain error was not found. The enhanced fault location algorithm uses DFT filter as well as the proposed DC offset filter. The behavior of the proposed fault location algorithm using off-line simulation has been verified by data about several fault conditions generated by the ATP simulation program.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.61 no.3
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• pp.373-379
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• 2012

This paper presents a fault location algorithm based on the adaptively estimated value of the local sequence source impedance for faults on a parallel transmission line. This algorithm uses only the local voltage and current signals of a faulted circuit. The remote current signals and the zero-sequence current of the healthy adjacent circuit are calculated by using the current distribution factors together with the local terminal currents of the faulted circuit. The current distribution factors consist of local equivalent source impedance and the others such as fault distance, line impedance and remote equivalent source impedance. It means that the values of the current distribution factors can change according to the operation condition of a power system. Consequently, the accuracy of the fault location algorithm is affected by the two values of equivalent source impedances, one is local source impedance and the other is remote source impedance. Nevertheless, only the local equivalent impedance can be estimated in this paper. A series of test results using EMTP simulation data show the effectiveness of the proposed algorithm. The proposed algorithm is valid for a double-circuit transmission line system where the equivalent source impedance changes continuously.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.65 no.3
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• pp.504-510
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• 2016

In general, a fault locator is installed in Sub-Station of AT(Auto-transformer) feeding system to estimate the fault location and to protect the Korean AT feeding system. Since the line impedance characteristic is different to normal 3-phase transmission line, we need particular modification factors, which can be calculated using fault location recording data, to estimate the accurate fault location. Up to recently, forcible ground test has been used to calculate the modification factors of the fault locator. However, large amount of current is occurred when the forcible ground test is performed, and this current affects to adjacent equipments. Therefore, we proposed a novel calculation method of modification factors, arbitrary trip test, using boosting current of the operating electric train. Through several field test, we confirmed that modification factors for fault locator can be easily calculated by using proposed method. Moreover, we verified the accuracy and stability of the proposed calculation method.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.30 no.1
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• pp.28-37
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• 2016

Fault locating is an important element to minimize the damage of power system. The computation error of fault locator may occur by the influence of the DC offset component during phasor extraction. In order to minimize the bad effects of DC offset component, this paper presents an improved fault location algorithm based on a DC offset removal filter for short fault in a double circuit transmission line. We have modeled a 154kV double circuit transmission line by the ATP software to demonstrate the effectiveness of the proposed fault locating algorithm. The line to line short faults were simulated and then collected simulation data was used. It can be seen that the error rate of fault locating estimation by the proposed algorithm decreases than the error rate of fault locating estimation by conventional algorithm.