• Information and Communications Magazine
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• v.17 no.2
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• pp.41-53
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• 2000

본 고에서는 코아 백본 시스템으로 사용될 수 있는 수준으로 고성능, 대용량화한 고성능 라우터시스템을 초고속 대용량 라우터로 정의하고, 초고속 대용량 라우터에 포함되어야 할 기술을 분석하였다. 또한 현재 출시되었거나 출시 예정인 초고속 대용량 라우터 및 고성능 라우터시스템을 간단히 소개하였다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.4B
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• pp.339-350
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• 2003

The demands of network users emphasize the improvement and guarantee of service quality as well as the increment of bandwidth. As a result, high performance and additional new functions are important features to build network equipments, especially and edge router. For this structure, network processors with high performance and flexibility are considered as a main part of a packet forwarding module. In this paper, we design and edge MPLS router with a network processor, which supports high performance and multi-functionalities and examine its advantage and limitation.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.11
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• pp.97-104
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• 2010

This paper presents a high performance 32-bit single core AES architecture. The proposed architecture employs a 5-stage pipeline: four stages in the ShiftRows/InvShiftRows module, and one stage in the MixColumn/InvMixColumn module. Circuit size reduction has been achieved through merging of the shift rows and inverse shift rows. The mix column and inverse mix column share the same resources. Three 32-bit registers replace the conventional ten 32-bit registers in the RCON architecture. The proposed architecture has been implemented in Verilog HDL, and yields 415 Mbits/s throughput with the circuit size of 13764 gate equivalents on the 0.18um CMOS process technology. This high performance architecture is suitable for wireless network router applications.

• The Journal of the Korea Contents Association
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• v.7 no.3
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• pp.50-59
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• 2007

IP address lookup is one of the most important and complex functions in the router. In this paper, we propose an improved technique of LC-trie to increase the performance of IP address lookup in the high performance router. We effectively apply the prefix pruning method, which is used for the compression of the forwarding table in TCAM((Ternary Content Addressable Memory), to the LC-trie. This technique can decrease the number of memory accesses and upgrade the lookup speed. Moreover, through the real forwarding table and the real traffic distribution, we evaluate the performance of our scheme in terms of the lookup time and the number of memory access, comparing with that of the previous LC-trie.

• Proceedings of the Korean Information Science Society Conference
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• 2007.06d
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• pp.503-507
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• 2007

라우터는 여러 곳에서 들어오는 패킷들을 빠르게 전달하는 기능을 담당하는 네트워크 장비로서, 들어오는 패킷들이 공평하게 서비스 받을 수 있도록 큐 관리 알고리즘을 사용한다. 그런데 대부분의 라우터들은 HOL 블록킹 문제 때문에 버퍼를 입력 포트 쪽이 아닌 가상적으로 출력 포트 쪽에 정의하는 VOQ로 구현을 하였고, 패킷들이 공평하게 서비스 받기 위해 DRR 알고리즘으로 구현하는 경향이 있다. 이 논문에서는 기존의 DRR 알고리즘에서 패킷 서비스를 위한 경직된 조건에 유연성을 주어 기존의 DRR 알고리즘의 복잡도와 공평성을 유지하는 한편 패킷 서비스 성능을 높여주는 NDRR 알고리즘을 제안한다.

• IEMEK Journal of Embedded Systems and Applications
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• v.5 no.1
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• pp.1-6
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• 2010

본 논문에서는 네트워크 온 칩(NoC: network on chip) 구조에서의 내부 데이터 통신의 성능을 최적화 할 수 있는 새로운 온 칩 네트워크 인터페이스 구조를 제안하였다. 제안하는 NoC 구조는 기본적으로 하드웨어 면적을 줄이기 위하여 XY 라우팅 알고리듬을 기반으로 구현되었으며, 전달되는 패킷의 크기 또는 플릿의 개수를 최소화하기 위하여 Golomb-Rice 인코딩/디코딩 알고리듬에 기반을 둔 하드웨어 압축기/해제기를 이용하여 통신되는 데이터의 양을 크게 줄임으로써 네트워크 지연시간을 최소화 할 수 있는 새로운 구조를 제안하였다. 즉 전송될 데이터는 전송자(sender)의 네트워크 인터페이스에서 내장된 하드웨어 인코더를 통해 압축된 형태로 패킷의 개수를 최소화하여 온 칩 네트워크상의 데이터를 업로드하게 된다. 이러한 압축된 데이터가 리시버(receiver)에 도착하면, 하드웨어 디코더를 통해서 원래의 데이터로 복원된다. 사이클 수준의 시뮬레이터를 통하여 제안된 라우터 구조가 온 칩 시스템의 네트워크 지연시간을 크게 줄일 수 있음을 증명하였다.

• Proceedings of the Korean Society of Computer Information Conference
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• 2022.01a
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• pp.103-105
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• 2022

본 논문에서는 GRE 터널링을 사용한 원격지에서의 BGP 어나운싱 방법에 대해 서술한다. BGP 어나운스를 진행하기 위해서는 고가의 라우터 장비와, 고성능, 고가용성의 네트워크, 자율시스템 망 식별 번호 (AS Number)이 필요하지만 소형 네트워크 운영을 위해 위 요소들을 모두 구비하는 것은 어려운 점이 많기 때문에, BGP Announce를 지원하는 퍼블릭 클라우드와의 GRE 라우팅을 사용해서 저비용으로 안정적인 BGP Announce를 하는 방법과, 이에 필요한 소프트웨어적 구성에 대해서 기술한다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.4B
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• pp.298-305
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• 2003

In this paper, we proposed a high performance lookup controller for IP packet forwarding engine of ATM based label edge routers. The lookup controller is designed to provide services such as MPLS, VPN, ELL, and RT services as well as the best effort. For high speed searching for IP addresses, we employed a TCAM based hardware search device not using traditional algorithmic approaches. We also implement lookup control functions into FPGA for fast processing of packet header and lookup control. The proposed lookup controller is designed to support differenciated services for users and to process in pipelined mechanism for performance improvement. A two-step search scheme is also applied to perform lookup for the key combined with multi-field of packet header. We found that the proposed lookup controller provides the performance of about 16M packets per second through simulations.

• The Transactions of the Korean Institute of Electrical Engineers P
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• v.66 no.4
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• pp.229-235
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• 2017

Until now, a study on a ubiquitous sensor network has been mainly concentrated in the areas of sensor nodes, and as a results, technologies related with sensor node were greatly developed. Despite of many achievements on research and development for a sensor node, a ubiquitous sensor network may failed to establish the actual service environment because variety of restrictions. In order to provide a actual service using a ubiquitous sensor networks applied to many results on research and development for a sensor nodes, a study on a wired/wireless composite router must be carried out. However a study on a wired/wireless composite router is relatively very slow compared with the sensor node. In this study, developed a high-performance router platform supporting IPv6 that can provide high-speed wired/wireless interface and QoS, and it can provide the multimedia service Interlocking the wireless sensor network and the Internet network. To analysis a given network environment and to develop the appropriate hardware and software in accordance with this requirement.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.2A
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• pp.79-85
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• 2006

Generally, it is essential that high-speed routers, switches, and network security appliances should have an efficient packet classification scheme in order to achieve the high-speed packet forwarding capability. For the multi-gigabit packet-processing network equipment the high-speed content search hardware such as TCAM and search engine is recently used to support the content-based packet inspection. During the packet classification process, hundreds and thousands of rules are applied to provide the network security policies regarding traffic screening, traffic monitoring, and traffic shaping. In addition, these rules could be dynamically changed during operations of systems if anomaly traffic patterns would vary. Particularly, in the high-speed network, an efficient algorithm that updates and reorganizes the packet classification rules is critical so as not to degrade the performance of the network device. In this paper, we have proposed an efficient update algorithm using a partial-ordering that can relocate the dynamically changing rules at the TCAM. Experimental results should that our algorithm does not need to relocate existing rules feature until 70$\%$ of TCAM utilization.