• Proceedings of the Korea Water Resources Association Conference
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• 2023.05a
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• pp.92-92
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• 2023

본 연구에서는 대한민국 도시 유역에 대하여 딥러닝 네트워크 기반의 분산형 수문 모형을 개발하였다. 개발된 모형은 완전연결계층(Fully Connected Layer)으로 연결된 여러 개의 장단기 메모리(LSTM-Long Short-Term Memory) 은닉 유닛(Hidden Unit)으로 구성되었다. 개발된 모형을 사용하여 연구 지역인 중랑천 유역을 분석하기 위해 1km² 해상도의 239개 모델 격자 셀에서 10분 단위 레이더-지상 합성 강수량과 10분 단위 기온의 시계열을 입력으로 사용하여 10분 단위 하도 유량을 모의하였다. 모형은 보정과(2013~2016년)과 검증 기간(2017~2019년)에 대한 NSE 계수는각각 0.99와 0.67로 높은 정확도를 보였다. 본 연구는 모형을 추가적으로 심층 분석하여 다음과 같은 결론을 도출하였다: (1) 모형을 기반으로 생성된 유출-강수 비율 지도는 토지 피복 데이터에서 얻은 연구 지역의 불투수율 지도와 유사하며, 이는 모형이 수문학에 대한 선험적 정보에 의존하지 않고 입력 및 출력 데이터만으로 강우-유출 분할과정을 성공적으로 학습하였음을 의미한다. (2) 모형은 연속 수문 모형의 필수 전제 조건인 토양 수분 의존 유출 프로세스를 성공적으로 재현하였다; (3) 각 LSTM 은닉 유닛은 강수 자극에 대한 시간적 민감도가 다르며, 응답이 빠른 LSTM 은닉 유닛은 유역 출구 근처에서 더 큰 출력 가중치 계수를 가졌는데, 이는 모형이 강수 입력에 대한 직접 유출과 지하수가 주도하는 기저 흐름과 같이 응답 시간의 차이가 뚜렷한 수문순환의 구성 요소를 별도로 고려하는 메커니즘을 가지고 있음을 의미한다.

• Journal of KIISE:Information Networking
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• v.29 no.6
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• pp.595-612
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• 2002

One of the most important issues in guaranteeing the high degree of QoS on mobile computing is how to reduce hand-off drops caused by lack of available bandwidth in a new cell. Each cell can request bandwidth reservation to its adjacent cells for hand-off calls. This reserved bandwidth can be used only for hand-offs, not for new calls. It is also important to determine how much of bandwidth should be reserved for hand-off calls because reserving too much would increase the probability of a new call being blocked. Therefore, it is essential to develop a new mechanism to provide QoS guarantee on a mobile computing environment by reserving an appropriate amount of bandwidth and call admission control. In this paper. bandwidth reservation and call admission control mechanisms are proposed to guarantee a consistent QoS for multimedia traffics on a mobile computing environment. For an appropriate bandwidth reservation, we propose an adaptive bandwidth reservation mechanism based on an MPP and a 2-tier cell structure. The former is used to predict a next move of the client while the latter to apply our mechanism only to the client with a high hand-off probability. We also propose a call admission control that performs call admission test only on PNC(Predicted Next Cell) of a client and its current cell. In order to minimize a waste of bandwidth caused by an erroneous prediction of client's location, we utilize a common pool and QoS adaptation scheme. In order evaluate the performance of our call admission control mechanism, we measure the metrics such as the blocking probability of new calls, dropping probability of hand-off calls, and bandwidth utilization. The simulation results show that the performance of our mechanism is superior to that of the existing mechanisms such as NR-CAT2, FR-CAT2, and AR-CAT2.

• The Transactions of the Korea Information Processing Society
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• v.3 no.4
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• pp.697-708
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• 1996

In this paper, we study reactive congestion control with priority in ATM network. The priority schemes for buffer access, partial buffer sharing have been investigated in order to improve the utilization of ATM network resources the network and to satisfy the most demanding traffic class. We consider in this paper a discrete-time queueing model for partial buffer sharing with two Markov modulated Poisson inputs. This model can be used to analyze the the effects of the partial buffer sharing priority scheme on system performance for realistic cases of bursty services. Explicit formulae are derived for the number of cells in the system and the loss probabilities for the traffic. Congestion may still occur because of unpredictable statistical fluctuation of traffic sources even when preventive control is performed in the network. In this Paper, we study reactive congestion control, in which each source changes its cell emitting rate a daptively to the traffic load at the switching node. Our intention is that,by incorporating such a congcstion control method in ATM network,more efficient congsestion control is established. We develope an analytical model,and carry out an approximateanalysis of reactive congestion con-trol with priority.Numerical results show that several orders of magnitude improvement in the loss probability can be achieved for the high priority class with little impact on the low priority class performance.And the results show that the reactive congestion control with priority are very effective in avoiding congestion and in achieving the statistical gain.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.21 no.4
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• pp.795-803
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• 2017

This paper describes a dual-standard cryptographic processor that efficiently integrates two block ciphers ARIA and AES into a unified hardware. The ARIA-AES crypto-processor was designed to support 128-b and 256-b key sizes, as well as four modes of operation including ECB, CBC, OFB, and CTR. Based on the common characteristics of ARIA and AES algorithms, our design was optimized by sharing hardware resources in substitution layer and in diffusion layer. It has on-the-fly key scheduler to process consecutive blocks of plaintext/ciphertext without reloading key. The ARIA-AES crypto-processor that was implemented with a $0.18{\mu}m$ CMOS cell library occupies 54,658 gate equivalents (GEs), and it can operate up to 95 MHz clock frequency. The estimated throughputs at 80 MHz clock frequency are 787 Mbps, 602 Mbps for ARIA with key size of 128-b, 256-b, respectively. In AES mode, it has throughputs of 930 Mbps, 682 Mbps for key size of 128-b, 256-b, respectively. The dual-standard crypto-processor was verified by FPGA implementation using Virtex5 device.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.8 no.6
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• pp.1107-1114
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• 2004

System Packet Interface Level 4 Phase 2(SPI-4.2) is an interface for packet and cell transfer between a physical layer(PHY) device and a link layer device, for aggregate bandwidths of OC-192 ATM and Packet Over Sonet/SDH(POS), as well as 10Gbps Ethernet applications. SPI-4.2 core consists of Tx and Rx modules and supports full duplex communication. Tx module of SPI-4.2 core writes 64-bit data word and 14-bit header information from the user interface into asynchronous FIFO and transmits DDR(Double Data Rate) data over PL4 interface. Rx module of SPI-4.2 core operates in vice versa. Tx and Rx modules of SPI-4.2 core are designed to support maximum 256-channel and control the bandwidth allocation by configuring the calendar memory. Automatic DIP4 and DIP-2 parity generation and checking are implemented within the designed core. The designed core uses Xilinx ISE 5.li tool and is described in VHDL Language and is simulated by Model_SIM 5.6a. The designed core operates at 720Mbps data rate per line, which provides an aggregate bandwidth of 11.52Gbps. SPI-4.2 interface core is suited for line cards in gigabit/terabit routers, and optical cross-connect switches, and SONET/SDH-based transmission systems.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.11
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• pp.19-27
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• 1998

To achieve the required services in the next-generation cellular telephone systems, the size of the cell become smaller and/or is of mixed macrocells and microcells. For more efficient system control, We make use of the mobile position and velocity information, provided that the mobility information is relatively accurate. In this paper, we propose an improved version of path-loss measurement algorithm introduced in literature[11]. The microcellular structure with severe multipath fading, reflection and refraction make mobile position and velocity estimation very difficult. In the proposed method, the pre-recorded path-loss informations, called the discrete position data base, are searched to estimate the position. Velocity estimation is obtained as a difference of the position values with respect to the time difference. Moving average filter is applied to smooth the estimated velocity and to reduce the error in the estimates. We also propose a method to simplify system implementation by reducing search area for discrete area database.

• Transactions of the Korean Society of Mechanical Engineers A
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• v.35 no.3
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• pp.223-233
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• 2011

A ceramic monolithic catalyst is a honeycomb structure that consists of two layers. The honeycomb structure is regarded as a continuum in structure and heat-flow analysis. The equivalent mechanical properties of the honeycomb structure were determined by performing finite element analysis (FEA) for a test specimen. Bending strength experiments and FEA of the test specimen used in ASTM C1674-08 standard test were performed individually. The bonding coefficient between the cordierite ceramic layer and the washcoat layer was almost zero. The FEA test specimen was modeled on the basis of the bonding coefficient. The elastic modulus, Poisson's ratio, and the thermal properties of the ceramic monolithic substrate were determined by performing the FEA of the test specimen.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.28 no.7A
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• pp.493-502
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• 2003

In this paper, to solve some problems of the Mobile IP and local registration strategy we propose a method that can effectively support real-time traffics sensitive to delay time and packet loss. The proposed method reduces the registration time after a Mobile Node's movement between networks by carrying out the pre-registration for the domain which it will move into the network information of the link layer of cdma2000 system, at the boundary cell's handoff zone. Through the cost analysis and simulation it is shown that the proposed scheme yield a better performance compared with the Mobile IP and local registration strategies in terms of packet loss for parameters; variation of the velocity of a Mobile Node, and a distance between the Mobile Node and home networks, etc.

• Journal of the Korea Computer Graphics Society
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• v.7 no.4
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• pp.9-18
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• 2001

There was much previous work to represent effects which are used in the real world paintings. In case of Western paintings like as watercolor or oil painting, largely conversion techniques from photo images were researched. However, in case of Oriental paintings, the development of a conversion technique is not easy because a few strokes are used to represent objects. Then, model-based approach was studied to draw Oriental paintings. In this paper, a model-based approach for Oriental paintings is described. In our model, to represent the diffusion effects, LEM(Local Equilibrium Model) is proposed. LEM is a method to calculate the movement of water and ink effectively. Also, a layer model for paper is proposed to discriminate wet or dry state. And a brush model to draw strokes is described.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.4
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• pp.31-43
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• 1999

The main goal of this paper is to design a high performance SVP(Stack based Video Processor) for network applications. The SVP is a comprehensive scheme; 'better' in the sense that it is an optimal selection of previously proposed enhancements of a stack machine and a video processor. This can process effectively object-based video data using a S-RISC(Stack-based Reduced Instruction Set Computer) with a semi -general-purpose architecture having a stack buffer for OOP(Object-Oriented Programming) with many small procedures at running programs. And it includes a vector processor that can improve the MPEG coding speed. The vector processor in the SVP can execute advanced mode motion compensation, motion prediction by half pixel and SA-DCT(Shape Adaptive-Discrete Cosine Transform) of MPEG-4. Absolutors and halfers in the vector processor make this architecture extensive to a encoder. We also designed a VLSI stack-oriented video processor using the proposed architecture of stack-oriented video decoding. It was designed with O.5$\mu\textrm{m}$ 3LM standard-cell technology, and has 110K logic gates and 12 Kbits SRAM internal buffer. The operating frequency is 50MHz. This executes algorithms of video decoding for QCIF 15fps(frame per second), maximum rate of VLBV(Very Low Bitrate Video) in MPEG-4.