• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.29 no.6
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• pp.342-347
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• 2016

We investigated the effect of $Bi_{1/2}(Na_{0.82}K_{0.18})_{1/2}TiO_3$ (BNKT) modification on the ferroelectric and electric-field-induced strain (EFIS) properties of lead-free $0.97Bi_{1/2}(Na_{0.82}K_{0.18})_{1/2}TiO_3-0.03LaFeO_3$ (BNKTLF) ceramics as a function of BNKT content (x= 0, 0.1, 0.2, 0.3, 0.5, and 1). BNKT-modified BNKTLF powders were synthesized using a conventional solid-state reaction method. As the BNKT content x increased from 0 to 1 the normalized electric-field-induced strain ($S_{max}/E_{max}$) was observed to increase at relatively low fields, i.e., below the poling field. Moreover, BNKTLF-30BNKT showed about 460 pm/V as low as at 3 kV/mm, which is a considerably high value among the lead-free systems reported so far. Consequently, it was confirmed that ceramic-ceramic composite, a mixture of an ergodic relaxor matrix and embedded ferroelectric seeds, is a salient way to make lead-free piezoelectrics practical with enhanced EFIS at low field as well as less hysterical.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.116-116
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• 2007

21 세기에 접어들면서 인터넷을 통한 정보 통신의 발달과 개인 휴대용 이동 통신기기의 활발한 보급에 따라 휴대형 전자기기들의 소형화와 고성능화로 나아가고 있다. 이러한 전자기기에 사용될 IC의 내장 메모리 또한 집적화 및 고속화, 저 전력화가 이루어져야 한다. 이러한 전자기기들에 필수적인 압전 세라믹스 부품 중 압전 부저 및 기타 음향 부품등을 각종 전자기기와 무선 전화기에 채택함으로써 압전 부품에 대한 수요와 생산이 계속 증가할 것으로 전망된다. 이처럼 압전 세라믹스를 이용한 그 응용 범위는 대단히 방대하며, 현재 모든 압전 부품들은 PZT 계열 재료로 만들어지고 있고, 차후 모두 비납계열 재료로 대체될 것이 확실시된다. Pb의 환경오염은 이미 오래전부터 큰 문제점으로 인식되고 있었으며 그 일례로 미국의 캘리포니아 주에서는 1986년부터 약 800종의 유해물질, 그 중에서도 Pb 사용을 300ppm 이하로 규제하는 Proposition 65를 제정하여 실행하고 있다. 그리고 2003년 2월에 EU (European Union) 에서 발표한 전자산업에 관한 규제 사항중 하나인 위험물질 사용에 관한 지칭 (Restriction of Hazardous Substance, RoHS) 에 의하면, 2006 년 7월부터 전기 전자 제품에 있어서 위험 물질인 Pb을 포함한 중금속 물질(카드늄, 수은, 6가 크롬, 브롬계 난연재)의 사용을 금지한다고 발표하였다. 비록 전자세라믹 부품에 함유된 Pb는 예외 사항으로 두었지만 대체 가능한 물질이 개발되면 전자세라믹 부품에서도 Pb의 사용을 금지한다고 규정하였다. 더욱이 일본은 2005 년부터 Pb 사용을 금지시켰다. 이와 같이 Pb가 환경에 미치는 영향 때문에 비납계 강유전 물질 및 압전 세라믹스 재료에 대한 연구가 전 세계적으로 활발히 진행되고 있다. 본 연구에서는 비납계 강유전체의 patterning을 위해서, NKN 박막을 고밀도 플라즈마원인 ICP를 이용하여 식각 mechanism을 연구하고, 식각변수에 따른 식각 공정을 최적화에 대하여 연구하였다. 가스 혼합비에 따라 식각 할때 700 W의 RF 전력과 - 150 V의 직류 바이어스 전압을 인가하였고, 공정 압력은 2 Pa, 기판 온도는 $23^{\circ}C$로 고정하였다. 식각 속도는 Tencor사의 Alpha-step 500을 이용하여 측정되었으며 식각 시 NKN 박막 표면과 라디칼과의 화학적인 반응을 분석하고 식각 메커니즘을 규명하기 위하여 XPS(x-ray photoelectron spectroscopy)를 사용하였다.

• Journal of the Korean Vacuum Society
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• v.9 no.3
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• pp.258-262
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• 2000

$YMnO_3$thin films are deposited on Si(100) and $Y_2O_3/Si(100)$ substrate by radio frequency sputtering. The deposition condition of oxygen partial pressure and annealing temperature have significant influences on the preferred orientation of $YMnO_3$film and the size of memory window. The results of x-ray diffraction show that the film deposited in the oxygen partial pressure of 0% is highly oriented along c-axis after annealing at $870^{\circ}C$ for 1 hr in oxygen ambient. However, the films deposited on Si and $Y_2O_3/Si$ in the oxygen partial pressures of 20% show $Y_2O_3$ peak, the excess $Y_2O_3$ in the $YMnO_3$film suppresses the c-axis oriented crystallization. Especially memory windows of the $Pt/YMnO_3/Y_2O_3/Si$ capacitor are 0.67~3.65 V at applied voltage of 2~12 V, which is 3 times higher than that of the film deposited on $Y_2O_3/Si$ in 20% oxygen (0.19~1.21 V) at the same gate voltage because the film deposited in 0% oxygen is well crystallized along c-axis.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.1
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• pp.88-92
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• 2023

The ferroelectricity in Hf_0.5Zr_0.5O₂ (HZO) thin films is one of the most interesting topics for next-generation nonvolatile memory applications. It is known that a crystallization process is required at a temperature of 400℃ or higher to form an orthorhombic phase that results in the ferroelectric properties of the HZO film. However, to realize the integration of ferroelectric HZO films in the back-end-of-line, it is necessary to reduce the annealing temperature below 400℃. This study aims to comprehensively analyze the ferroelectric properties according to the annealing temperature (350-500℃) and time (1-5 h) using a furnace as a crystallization method for HZO films. As a result, the ferroelectric behaviors of the HZO films were achieved at a temperature of 400℃ or higher regardless of the annealing time. At the annealing temperature of 350℃, the ferroelectric properties appeared only when the annealing time was sufficiently increased (4 h or more). Based on these results, it was experimentally confirmed that the optimization of the annealing temperature and time is very important for the ferroelectric phase crystallization of HZO films and the improvement of their ferroelectric properties.

• Korean Journal of Materials Research
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• v.11 no.5
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• pp.367-371
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• 2001

In this paper, theS $r_2$(T $a_{1-x}$ , N $b_{x}$)$_2$ $O_{7}$(STNO) films among ferroelectric materials having a low dielectric constant for metal-ferroelectric-semiconductor field effect transistor(MFS-FET) were discussed. The STNO thin films were deposited on p-type Si(100) at room temperature by co-sputtering with S $r_2$N $b_2$ $O_{7(SNO)}$ ceramic target and T $a_2$ $O_{5}$ ceramic target. The composition of STNO thin films was varied by adjusting the power ratios of SNO target and T $a_2$ $O_{5}$ target. The STNO films were annealed at 8$50^{\circ}C$, 90$0^{\circ}C$ and 9$50^{\circ}C$ temperature in oxygen ambient for 1 hour. The value of x has significantly influenced the structure and electrical properties of the STNO films. In the case of x= 0.4, the crystallinity of the STNO films annealed at 9$50^{\circ}C$ was observed well and the memory windows of the Pt/STNO/Si structure were 0.5-8.3 V at applied voltage of 3-9 V and leakage current density was 7.9$\times$10$_{08}$A/$\textrm{cm}^2$ at applied voltage of -5V.of -5V.V.V.