• Journal of the Institute of Electronics Engineers of Korea SP
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• v.44 no.3
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• pp.70-79
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• 2007

H.264/AVC has many repeated computation for motion estimation. Because of that, it takes much time to encode and it is very hard to implement into a real-time encoder. Many fast algorithms were proposed to reduce computation time but encoding quality couldn't be qualified. In this paper we proposed a new motion vector prediction method for efficient and fast full search H.264/AVC motion estimation. We proposed independent motion vector prediction and SAD share for motion estimation. Using our algorithm, motion estimation reduce calculation complexity 80% and less distortion of image (less PSNR drop) than previous full search scheme. We simulated our proposed method. Maximum Y PSNR drop is about 0.04 dB and average bit increasing is about 0.6%.

• The KIPS Transactions:PartB
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• v.17B no.1
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• pp.31-36
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• 2010

After the launch of MPEG-2, it is widely used in multimedia applications like a Digital-TV or a DVD. Then, After the launch of H.264 at 2004, it has been expected to replace MPEG-2 and services IPTV and DMB. As we have been used to MPEG-2 devices by this time, we can not access H.264 Broadcast with MPEG-2 device. So We propose a new approach to transcode H.264 video into MPEG-2 form which can facilitate to display H.264 video with MPEG-2 device. To reduce the quality loss by transcoding, we use CPDT(Cascaded Pixel Domain Transcoder) structure. And to minimize processing time, SKIP block, INTRA block and motion vectors obtain from decoding process is employed for transcoding. we use BMA(Boundary Matching Algorithm) to select only one from candidate motion vectors. Experimental results show a considerable improved PSNR with reduction in processing time compared with existing methods.

• The KIPS Transactions:PartB
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• v.13B no.4 s.107
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• pp.463-470
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• 2006

It is difficult to track and extract the movement of an object through a camera exactly because of noises and changes of the light. The fast searching algorithm is necessary to extract the object and to track the movement for realtime image. In this paper, we propose the correct and fast algorithm using the variable searching area and the background image change method to robustic for the change of background image. In case the threshold value is smaller than reference value on an experimental basis, change the background image. When it is bigger, we decide it is the point of the time of the object input and then extract boundary point of it through the pixel check. The extracted boundary points detect precise movement of the object by creating area block of it and searching block that maintaining distance. The designed and embodied system shows more than 95% accuracy in the experimental results.

• Journal of Korea Multimedia Society
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• v.13 no.2
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• pp.185-195
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• 2010

In this paper, we propose an efficient inter and intra prediction algorithms for fast encoding of H.264/AVC. First, inter prediction mode decision method decides early using temporal/spatial correlation information and pixel direction information. Second, intra prediction mode decision method selects block size judging smoothness degree with inner/outer pixel value variation and decides prediction mode using representative pixel and reference pixel. Lastly, adaptive motion search region restriction sets search region using mode information of neighboring block and predicted motion vector. The experimental results show that proposed method can achieve about 18~53% reduction compared with the existing JM 14.1 in the encoding time. In RD performance, the proposed method does not cause significant PSNR value losses while increasing bitrates slightly.

• Journal of Biomedical Engineering Research
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• v.19 no.4
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• pp.361-367
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• 1998

We student tow image characteristics, the smoothness and the similarity, which give rise to local and global redundancy in image representation. The smoothness means that the gray level values within a given block vary gradually rather than abruptly. The similarity means that any patterns in an image repeat itself anywhere in the rest of the image. In this sense, we proposed a lossless medical image compression scheme which exploits both types of redundancy. The proposed method segments the image into variable size blocks and encodes them depending on characteristics of the blocks. The proposed compression schemes works better 10~40[%] than other compression scheme such as the Huffman, the arithmetic, the Lempel-Ziv, HINT(Hierachical Interpolation) and the lossless scheme of JPEG with one predictor.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.35 no.5C
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• pp.454-463
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• 2010

After the efficiency of H.264 video compression has been announced, it replaced MPEG-2 standard in several applications. So transcoding methods of MPEG-2 to H.264 have been studying because there are variety devices and contents followed by MPEG-2. Although H.264 supported various service such as IPTV, DMB, digital broadcasting etc, but users using MPEG-2 devices cannot accessible to them. This paper propose H.264 to MPEG-2 transcoding for users of MPEG-2 devices without displacement H.264. The proposed method predicted a motion vector for MPEG-2 encoder after it extracted from motion vectors of variable blocks in H.264 to improve processing time. Also it predicted a optimal motion vector using modified boundary matching algorithm after grasped a special character for boundary and background of object. The experimental results from proposed method show a considerable reduction in processing time, as much as 68% averagely, with a small objective quality reduction in PSNR.

• Journal of the Korean Society of Radiology
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• v.12 no.4
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• pp.505-510
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• 2018

In this study, we allocate bits by quantizing these fractal coefficients through a quantizer which can extract the probability distribution. In the coding process of IFS, a variable size block method is used to shorten the coding time and improve the compression ratio. In the future, it will be necessary to further improve the coding time and the compression rate while maintaining the best image quality in the fractal coding process.

• Proceedings of the Korean Society of Broadcast Engineers Conference
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• 2013.11a
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• pp.161-164
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• 2013

본 논문에서는 다양한 멀티미디어 코덱을 고속으로 처리하기 위하여 전용하드웨어가 아닌 병렬 어레이 프로세서 기반의 U-Chip(Universal-Chip) 구조를 제안하고 TSMC 80nm 공정을 사용하여 11,865,090개의 게이트 수를 가지는 칩으로 개발하였다. U-Chip은 역양자화(IQ), 역변환(IT), 움직임 보상(MC) 연산을 위한 $4{\times}16$ 개의 프로세싱 유닛으로 구성된 병렬 어레이 프로세서와 문맥적응적 가변길이디코딩(CAVLC)을 위한 비트스트림 프로세서와 인트라 예측(IP), 디블록킹필터(DF) 연산을 위한 순차 프로세서와 DMAC의 데이터 전송 및 각 프로세서를 제어하여 병렬 파이프라인 스케쥴링을 처리하는 시퀀서 프로세서 등으로 구성된다. 1개의 프로세싱 유닛에 1개의 매크로블록 데이터를 맵핑하여 총 64개의 매크로블록을 병렬처리 하였다. 64개 매크로블록의 대용량 데이터 전송 시간과 각 프로세서들의 연산을 동시에 병렬 파이프라인 함으로서 전체 연산 성능을 높일 수 있는 이점이 있다. 병렬 파이프라인 구조의 H.264 디코더 프로그램을 개발하였고 제작된 U-Chip을 통해 $720{\times}480$ 크기의 베이스라인 프로파일 영상에 대하여 코어 192MHz 동작, DDR 메모리 96MHz 동작에서 30fps의 처리율을 가짐을 확인하였다.

• Proceedings of the Korea Information Processing Society Conference
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• 2009.04a
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• pp.157-158
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• 2009

본 논문에서는 움직임 추정을 위한 탐색 영역내의 스캔 방법을 움직임 벡터가 나올 확률에 근거하여 가변적으로 적용하여 불필요한 후보 블록을 제거하는 PDE(patial distortion elimination) 기반의 고속 블록 매칭 알고리즘을 제안한다. 제안한 방법은 기존의 방법보다 불필요한 계수를 효율적으로 제거하기 위하여 탐색 영역 안에서 움직임 벡터가 존재 할 확률이 가장 높은 영역은 전영역 탐색을 적용하고, 움직임 벡터가 존재할 확률이 낮은 영역은 한 픽셀 건너 뛰어서 블록 정합하여 계산 비용을 효율적으로 감소시켯다. 제안한 알고리즘은 극히 낮은 화질 저하를 가지며, 기존의 H.264에서 사용되고 있는 전역 탐색 알고리즘에 비해 P프레임의 경우 85% 이상의 계산 비용 감소가 있어 H.264를 이용하는 비디오 압축 응용 분야에 유용하게 사용될 수 있을 것이다.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.31 no.7C
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• pp.713-724
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• 2006

The purpose of this study is to design, implement and verify the pre-modulation filter with the variable -3dB cutoff frequency and linear phase response for bandlimiting the allocation of radio frequency bandwidth for PCM/FM transmission. For the design of this required filter, the digital FIR filter, DAC system and tuneable 2nd order LPF have been constructed and simulated according to the attenuation characteristic requirement of the amplitude frequency response by each stage. From these results, we have implemented the filter and verified the analog conversion hardware part which is composed of DAC system and tuneable 2nd order LPF for the interpolation of the discrete sequences. Especially this paper proposes and carries out the verification processes using the tone generator and the calibration procedures for more precise frequency response of the filter.