• Title/Summary/Keyword: $TiO_2$ thin-film

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Seeding Effects on Phase Transformation in Diol-Based Sol-Gel Derived PZT Film (졸-겔 공정에 의해 Diol을 기반으로 제조된 PZT막 상전이에 대한 종자 영향)

  • An, Byung-Hun;Whang, Chin-Myung
    • Korean Journal of Materials Research
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    • v.9 no.12
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    • pp.1181-1187
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    • 1999
  • PZT(53/47) precursor 1M sols were prepared using a diol based Sol-Gel process, and thin films were deposited by spin coating onto Pt/Ti/$SiO_2$/Si substrates. With a single coating, final film thickness of aproximately 0.9${\mu}m $ was achieved from diol-based PZT sol. Since PZT crystallized in a ferroelectric perovskite phase from an intermediate nonferroelectric pyrochlore phase, the effects of the presence of perovskite PZT seeds on the phase transformation of PZT were investigated. Seeded PZT films were prepared from the seeded PZT 1M sols in which seeds with less than 0.2${\mu}m $ in size and 1wt% were dispersed in n-propanol before mixing with the PZT stock solution. The seeding effects were confirmed by the fact that the formation temperature of perovskite phase decreased by 50$^{\circ}C$ with less than 1wt% seeds.

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Evaluation of Bioactivity of Ti-6Al-7Nb Alloys with Various Hydrothermal Treatment Times (열수처리 시간에 따른 Ti-6Al-7Nh 합금의 생체활성 평가)

  • Kwon O. S.;Choi S. K.;Park K. B.;Lee M. H.;Bae T. S.;Lee O. Y.
    • Korean Journal of Materials Research
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    • v.14 no.12
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    • pp.876-884
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    • 2004
  • This study was to investigate whether the bioactivity of the anodized and hydrothermally treated Ti-6Al-7Nb alloy were affected by the time of hydrothermal treatment. Anodizing was performed at current density 30 $mA/cm^2$ up to 300 V in electrolyte solutions containing $DL-{\alpha}-glycerophosphate$ disodium salt hydrate $(DL-{\alpha}-GP)$ and calcium acetate (CA). Hydrothermal treatment was done at $300^{\circ}C$ for 30 min, 1 hr, 2 hrs, and 4 hrs to produce a thin film layer of hydroxyapatite (HA). The bioactivity was evaluated from HA formation on the surfaces in a Hanks' solution with pH 7.4 at $36.5^{\circ}C$ for 10, 20, and 30 days. Anodic oxide films were porous with pore size of $1\sim4{\mu}m\;and\;3\sim4{\mu}m$ thickness. The anodic oxide films composed with strong anatase peak with presence of rutile peak, and showed the increase in intensity of anatase peak after hydrothermal treatment. It was shown that the intensity of anatase peak increased with increasing the time of hydrothermal treatment but was no difference in rutile peak. The corrosion voltage was the highest in the group of hydrothermal treatment for 2 hrs (Ecorr: -338.6 mV). The bioactivity in Hank's solution was accelerated with increasing the time of hydrothermal treatment.

Fabrication of sing1e layer $d^2B_{z}$/dxdy second-order SQUID gradiometer (단일층 $d^2B_{z}$/dxdy SQUID 2차 미분기 설계 및 제작)

  • 황윤석;박승문;이순걸;김인선;박용기
    • Progress in Superconductivity
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    • v.4 no.2
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    • pp.109-113
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    • 2003
  • We have developed a planar-type single layer second-order $high-T_{c}$ SQUID gradiometer, which can detect the $d^2$$B_{z/}$dxdy of the second-order field gradient. This SQUID gradiometer consists of four-way 'clover-leaf' pick-up loops and is coupled directly to a 4-junction dc SQUID in such a way that the coupling polarity of the two diagonal loops is opposite to that of the other two loops. The pickup loops are intrinsically balanced for both uniform field and the 1 st-order field gradient. The $YBa_2$$Cu_3$$O_{7}$ thin film was made by pulsed laser deposition method on $SrTiO_3$ single crystal substrate and patterned by photolithography with Ar ion milling technique. Response of this gradiometer was tested for both uniform field and the 2nd-order field gradient. Details of the design, fabrication, and results will be discussed.

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Fabrication and Characterization of the BLT/STA/Si Structure for Fe-FETs Application

  • Park, Kwang-Huna;Jeon, Ho-Seung;Park, Jun-Seo;Im, Jong-Hyun;Park, Byung-Eun;Kim, Chul-Ju
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.73-74
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    • 2006
  • Ferroelectric thin films have been widely investigated for future nonvolatile memory application. We fabricated the BLT ($(Bi,La)_4Ti_3O_{12}$) films on Si using a STA ($SrTa_2O_6$) buffer layer BLT and STA film were prepared by sol-gel method. Measurement data by XRD and AFM, showed that BLT film and STA films were well crystallized and a good surface morphology. From C-V measurement reward that the Au/BLT/STA/Si structure showed a clockwise hysteresis loop with a memory window of 1.5 V for the bias voltage sweep of ${\pm}5$ V. From results, the Au/BLT/STA/Si structure is useful for FeFETs.

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Dielectric properties of KTN(80/20) thin films with pzt buffer layer for tunable microwave devices

  • Kyeong-Min Kim;Sam-Haeng Lee;Byeong-Jun Park;Joo-Seok Park;Sung-Gap Lee
    • Journal of Ceramic Processing Research
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    • v.23 no.1
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    • pp.29-32
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    • 2022
  • K(Ta0.80Nb0.20)O3 films with Pb(Zr0.52Ti0.48)O3PZT buffer layer on Pt/Ti/SiO2/Si substrate were fabricated by sol-gel and spin-coating method. Structural and electrical properties were measured with variation of the sintering temperature, and the applicability to microwave materials was investigated. All K(Ta0.80Nb0.20)O3 films showed a cubic crystal structure. Average grain size was about 123~193 nm and average thickness of the K(Ta0.80Nb0.20)O3 films was approximately 366 nm. Through the AFM results, root mean square roughness (Rrms) of all K(Ta0.80Nb0.20)O3 films was around 6 nm. All K(Ta0.80Nb0.20)O3 films showed a tendency to increase dielectric loss as frequency increased. As the sintering temperature increased, tunability with an applied DC voltage indicated a decreasing tendency. Tunability and temperature coefficient of the K(Ta0.80Nb0.20)O3 film sintered at 700 ℃ showed good values of 22.1% at 10 V, -0.594/℃.

Application of OLED as the Integrated Light source for the Portable Lab-On-a-Chip (휴대형 랩온어칩을 위한 집적화 광원으로의 OLED 적용)

  • Kim, Ju-Hwan;Shin, Kyeong-Sik;Kim, Young-Min;Kim, Yong-Kook;Yang, Yeun-Kyeong;Kim, Tae-Song;Kang, Ji-Yoon;Kim, Sang-Sig;Ju, Byeong-Kwon
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.05a
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    • pp.193-197
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    • 2004
  • The organic light emitting diode (OLED) is proposed as the novel source in the microchip because it has ideal merits (various wavelengths, thin-film structure and overall emitting) for the integration. In this paper, we fabricated the finger-type pin photodiodes for fluorescence detection and the advanced microchip with OLED integrated pn the microchannel. The finger-type in the diode design extended the depletion region and reduced the internal resistance about 31.2% than rectangular-type. The photodiodes had a 100pA leakage current and a 8720 sensitivity $(I_{Light}/I_{Dark})$ at -1 V bias. The interference filter with 32 layers ($SiO_2$, $TiO_2$) was directly deposited on the photodiode. The OLED was fabricated on the ITO coated glass and was bonded with LOC. The application of thin-film OLED increased the excitation efficiency and simplified the integration process extremely. The prototype device of this application had a superior sensitivity of 100nM-LOD in the fluorescence detection.

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Preparation of Field Effect Transistor with $(Bi,La)Ti_3O_{12}$ Ferroelectric Thin Film Gate ($(Bi,La)Ti_3O_{12}$ 강유전체 박막 게이트를 갖는 전계효과 트랜지스터 소자의 제작)

  • Suh Kang Mo;Park Ji Ho;Gong Su Cheol;Chang Ho Jung;Chang Young Chul;Shim Sun Il;Kim Yong Tae
    • Proceedings of the International Microelectronics And Packaging Society Conference
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    • 2003.11a
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    • pp.221-225
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    • 2003
  • The MFIS-FET(Field Effect Transistor) devices using $BLT/Y_2O_3$ buffer layer on p-Si(100) substrates were fabricated by the Sol-Gel method and conventional memory processes. The crystal structure, morphologies and electrical properties of prepared devices were investigated by using various measuring techniques. From the C-V(capacitance-voltage) data at 5V, the memory window voltage of the $Pt/BLT/Y_2O_3/si$ structure decreased from 1.4V to 0.6V with increasing the annealing temperature from $700^{\circ}C\;to\;750^{\circ}C$. The drain current (Ic) as a function of gate voltages $(V_G)$ for the $MFIS(Pt/BLT/Y_2O_3/Si(100))-FET$ devices at gate voltages $(V_G)$ of 3V, 4V and 5V, the memory window voltages increased from 0.3V to 0.8V as $V_G$ increased from 3V to 5V.

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Interface Control to get Higher Efficiency in a-Si:H Solar Cell

  • Han, Seung-Hee;Kim, En-Kyeom;Park, Won-Woong;Moon, Sun-Woo;Kim, Kyung-Hun;Kim, Sung-Min
    • Proceedings of the Korean Vacuum Society Conference
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    • 2012.08a
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    • pp.193-193
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    • 2012
  • In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is the most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. Single-chamber PECVD system for a-Si:H solar cell manufacturing has the advantage of lower initial investment and maintenance cost for the equipment. However, in single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of single-chamber PECVD system. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. In order to remove the deposited B inside of the plasma chamber during p-layer deposition, a high RF power was applied right after p-layer deposition with SiH4 gas off, which is then followed by i-layer, n-layer, and Ag top-electrode deposition without vacuum break. In addition to the p-i interface control, various interface control techniques such as FTO-glass pre-annealing in O2 environment to further reduce sheet resistance of FTO-glass, thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, and hydrogen plasma treatment prior to n-layer deposition, etc. were developed. The best initial solar cell efficiency using single-chamber PECVD system of 10.5% for test cell area of 0.2 $cm^2$ could be achieved by adopting various interface control methods.

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The electrical properties of PLZT thin films on ITO coated glass with various post-annealing temperature (ITO 기판에 제작된 PLZT 박막의 후열처리 온도에 따른 전기적 특성평가)

  • Cha, Won-Hyo;Youn, Ji-Eon;Hwang, Dong-Hyun;Lee, Chul-Su;Lee, In-Seok;Sona, Young-Guk
    • Journal of the Korean Vacuum Society
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    • v.17 no.1
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    • pp.28-33
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    • 2008
  • Lanthanum modified lead zirconate titanate ($Pb_{1.1}La_{0.08}Zr_{0.65}Ti_{0.35}O_3$) thin films were fabricated on indium doped tin oxide (ITO)-coated glass substrate by R.F magnetron sputtering method. The thin films were deposited at $500^{\circ}C$ and post-annealed with various temperature ($550-750^{\circ}C$) by rapid thermal annealing technique. The structure and morphology of the films were characterized with X-ray diffraction (XRD) and atomic force microscopy (AFM) respectively. The hysteresis loops and fatigue properties of thin films were measured by precision material analyzer. As the annealing temperature was increased, the remnant polarization value was increased from $10.6{\mu}C/cm^2$ to $31.4{\mu}C/cm^2$, and coercive field was reduced from 79.9 kV/cm to 60.9 kV/cm. As a result of polarization endurance analysis, the remnant polarization of PLZT thin films annealed at $700^{\circ}C$ was decreased 15% after $10^9$ switching cycles using 1MHz square wave form at ${\pm}5V$.

a-Si:H TFT Using Ferroelectrics as a Gate Insulator (강유전체를 게이트 절연층으로 한 수소화 된 비정질실리콘 박막 트랜지스터)

  • 허창우;윤호군;류광렬
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.537-541
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    • 2003
  • The a-Si:H TFTs using ferroelectric of SrTiO$_3$, as a gate insulator is fabricated on glass. Dielectric characteristics of ferroelectric is better than SiO$_2$, SiN. Ferroelectric increases ON-current, decreases threshold voltage of TFT and also breakdown characteristics. The a-Si:H deposited by PECVD shows absorption band peaks at wavenumber 2,000 $cm^{-1}$ /, 635 $cm^{-1}$ / and 876 $cm^{-1}$ / according to FTIR measurement. Wavenumber 2,000 $cm^{-1}$ /, 635 $cm^{-1}$ / are caused by stretching and rocking mode SiH1. The wavenumber of weaker band, 876 $cm^{-1}$ / is due to SiH$_2$ vibration mode. The a-SiN:H has optical bandgap of 2.61 eV, refractive index of 1.8 - 2.0 and resistivity of 10$^{11}$ - 10$^{15}$ aim respectively. Insulating characteristics of ferroelectric is excellent because dielectric constant of ferroelectric is about 60 - 100 and breakdown strength is over 1 MV/cm. TFT using ferroelectric has channel length of 8 - 20 $\mu$m and channel width of 80 - 200 $\mu$m. And it shows drain current of 3 $\mu$A at 20 gate voltages, Ion/Ioff ratio of 10$^{5}$ - 10$^{6}$ and Vth of 4 - 5 volts.

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