• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.264-264
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• 2007

$B_2Mg_{2/3}/Nb_{4/3}O_7\;(B_2MN)$ thin films and $Bi_{3/2}MgNb_{3/2}O_7\;(B_{1.5}MN)$ thin films were deposited as a function of various deposition temperatures on Pt/$TiO_2/SiO_2$/Si substrates by radio frequency magnetron sputtering system. Both of their thin films are shown to crystalline phase at $500^{\circ}C$, deposition temperature, using 100W RF power. The composition of them and structural micro properties are investigated by RBS spectrum and SEM, AFM. 200 nm-thick $B_2MN$ thin films were deposited at room temperature had capacitance density of $151nF/cm^2$ at 100kHz, dissipation factor of 0.003 and had capacitance density of $584nF/cm^2$ at 100kHz, dissipation factor of 0.0045 at $500^{\circ}C$ deposition temperature. Both of their dielectric constant deposited at room temperature and at $500^{\circ}C$ were each approximately 40 and 100.

• Journal of the Korean institute of surface engineering
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• v.34 no.5
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• pp.421-428
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• 2001

New WC-CrN superlattice film was deposited on Si substrate (500$\mu\textrm{m}$) using cathodic arc ion plating system. The microstructure and mechanical properties of the film depend on the superlattice period (λ). In the X-ray diffraction analysis (XRD), preferred orientation of microstructure was changed according to various superlattice periods(λ). During the Transmission Electron Microscope analysis (TEM), microstructure and superlattice period (λ) of the WC - CrN superlattice film was confirmed. Hardness and adhesion of the deposited film was evaluated by nanoindentation test and scratch test, respectively. As a result of nanoindentation test, the hardness of WC - CrN superlattice film was gained about 40GPa at superlattice period (λ) with 7nm. Also residual stress with various superlattice period (λ) was measured on Si wafer (100$\mu\textrm{m}$) by conventional beam-bending technique. The residual stress of the film was reduced to a value of 0.2 GPa by introducing Ti - WC buffer layers periodically with a thickness ratio ($t_{buffer}$/$t_{buffer+superlattice}$ ). To the end, for the evaluation of oxidation resistance at the elevated temperature, CrN single layer and WC - CrN superlattice films with various superlattice periods on SKD61 substrate was measured and compared with the oxidation resistance.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.230-230
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• 2013

In amorphous or microcrystalline thin-film silicon solar cells, p-i-n structure is used instead of p/n junction structure as in wafer-based Si solar cells. Hence, these p-i-n structured solar cells inevitably consist of many interfaces and the cell efficiency critically depends on the effective control of these interfaces. In this study, in-situ plasma treatment process of the interfaces was developed to improve the efficiency of a-Si:H solar cell. The p-i-n cell was deposited using a single-chamber VHF-PECVD system, which was driven by a pulsed-RF generator at 80 MHz. In order to solve the cross-contamination problem of p-i layer, high RF power was applied without supplying SiH4 gas after p-layer deposition, which effectively cleaned B contamination inside chamber wall from p-layer deposition. In addition to the p-i interface control, various interface control techniques such as thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, multiple applications of thin i-layer deposition and H2 plasma treatment, H2 plasma treatment of i-layer prior to n-layer deposition, etc. were developed. In order to reduce the reflection at the air-glass interface, anti-reflective SiO2 coating was also adopted. The initial solar cell efficiency over 11% could be achieved for test cell area of 0.2 $cm^2$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.319-320
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• 2008

본 연구에서는 대기압하에서 고품질의 산화막 증착을 목적으로 TEOS(Tetraethyl Orthosilicate)를 이용하여 APCVD법(Atmospheric Pressure CVD)으로 실리콘 산화막을 증착하고 하였으며, 특성 비교를 위하여 ICP-CVD를 이용하여 $SiH_4$ 와 $N_2O$ source gas를 이용하여 산화막을 증착하였다. 트랜지스터 제작후 Semiconductor measurement system을 이용하여 TFT의 전기적 특성을 측정 하였으며, 결과적으로 유기 사일렌을 사용한 경우 보다 우수한 전기적 특성을 확인할 수 있었다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.477-477
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• 2008

For more than three decades, the gate dielectrics in CMOS devices are $SiO_2$ because of its blocking properties of current in insulated gate FET channels. As the dimensions of feature size have been scaled down (width and the thickness is reduced down to 50 urn and 2 urn or less), gate leakage current is increased and reliability of $SiO_2$ is reduced. Many metal oxides such as $TiO_2$, $Ta_2O_4$, $SrTiO_3$, $Al_2O_3$, $HfO_2$ and $ZrO_2$ have been challenged for memory devices. These materials posses relatively high dielectric constant, but $HfO_2$ and $Al_2O_3$ did not provide sufficient advantages over $SiO_2$ or $Si_3N_4$ because of reaction with Si substrate. Recently, $HfO_2$ have been attracted attention because Hf forms the most stable oxide with the highest heat of formation. In addition, Hf can reduce the native oxide layer by creating $HfO_2$. However, new gate oxide candidates must satisfy a standard CMOS process. In order to fabricate high density memories with small feature size, the plasma etch process should be developed by well understanding and optimizing plasma behaviors. Therefore, it is necessary that the etch behavior of $HfO_2$ and plasma parameters are systematically investigated as functions of process parameters including gas mixing ratio, rf power, pressure and temperature to determine the mechanism of plasma induced damage. However, there is few studies on the the etch mechanism and the surface reactions in $BCl_3$ based plasma to etch $HfO_2$ thin films. In this work, the samples of $HfO_2$ were prepared on Si wafer with using atomic layer deposition. In our previous work, the maximum etch rate of $BCl_3$/Ar were obtained 20% $BCl_3$/ 80% Ar. Over 20% $BCl_3$ addition, the etch rate of $HfO_2$ decreased. The etching rate of $HfO_2$ and selectivity of $HfO_2$ to Si were investigated with using in inductively coupled plasma etching system (ICP) and $BCl_3/Cl_2$/Ar plasma. The change of volume densities of radical and atoms were monitored with using optical emission spectroscopy analysis (OES). The variations of components of etched surfaces for $HfO_2$ was investigated with using x-ray photo electron spectroscopy (XPS). In order to investigate the accumulation of etch by products during etch process, the exposed surface of $HfO_2$ in $BCl_3/Cl_2$/Ar plasma was compared with surface of as-doped $HfO_2$ and all the surfaces of samples were examined with field emission scanning electron microscopy and atomic force microscope (AFM).

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.7
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• pp.486-493
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• 2003

Schottky type A $l_{0.33}$G $a_{0.67}$N ultraviolet photodetectors were fabricated on the MOCVD grown AlGaN/ $n^{＋}$-GaN and AlGaN/AlGaN interlayer/ $n^{＋}$-GaN structures. The grown layers have the carrier concentrations of -$10^{18}$, and the mobilities were 236 and 269 $\textrm{cm}^2$/V.s, respectively. After mesa etching by ICP etching system, the Si3N4 layer was deposited for passivation between the contacts and Ti/AL/Ni/Au and Pt were deposited for ohmic and Schottky contact, respectively. The fabricated Pt/A $l_{0.33}$G $a_{0.67}$N Schottky diode revealed a leakage current of 1 nA for samples with interlayer and 0.1$\mu\textrm{A}$ for samples without interlayer at a reverse bias of -5 V. In optical measurement, the Pt/A $l_{0.33}$G $a_{0.67}$N diode with interlayer showed a cut-off wavelength of 300 nm, a prominent responsivity of 0.15 A/W at 280 nm and a UV-visible extinction ratio of 1.5x$10^4./TEX>.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.193-193
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• 2012

In thin film silicon solar cells, p-i-n structure is adopted instead of p/n junction structure as in wafer-based Si solar cells. PECVD is the most widely used thin film deposition process for a-Si:H or ${\mu}c$-Si:H solar cells. Single-chamber PECVD system for a-Si:H solar cell manufacturing has the advantage of lower initial investment and maintenance cost for the equipment. However, in single-chamber PECVD system, doped and intrinsic layers are deposited in one plasma chamber, which inevitably impedes sharp dopant profiles at the interfaces due to the contamination from previous deposition process. The cross-contamination between layers is a serious drawback of single-chamber PECVD system. In this study, a new plasma process to solve the cross-contamination problem in a single-chamber PECVD system was suggested. In order to remove the deposited B inside of the plasma chamber during p-layer deposition, a high RF power was applied right after p-layer deposition with SiH4 gas off, which is then followed by i-layer, n-layer, and Ag top-electrode deposition without vacuum break. In addition to the p-i interface control, various interface control techniques such as FTO-glass pre-annealing in O2 environment to further reduce sheet resistance of FTO-glass, thin layer of TiO2 deposition to prevent H2 plasma reduction of FTO layer, and hydrogen plasma treatment prior to n-layer deposition, etc. were developed. The best initial solar cell efficiency using single-chamber PECVD system of 10.5% for test cell area of 0.2 $cm^2$ could be achieved by adopting various interface control methods.

• 한국신재생에너지학회:학술대회논문집
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• 2007.06a
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• pp.250-253
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• 2007

An evaporated Ti/Pd/Ag contact system is most widely used to make high-efficiency silicon solar cells, however, the system is not cost effective due to expensive materials and vacuum techniques. Commercial solar cells with screen-printed contacts formed by using Ag paste suffer from a low fill factor and a high shading loss because of high contact resistance and low aspect ratio. Low-cost Ni and Cu metal contacts have been formed by using electroless plating and electroplating techniques to replace the Ti/Pd/Ag and screen-printed Ag contacts. Ni/Cu alloy is plated on a silicon substrate by electro-deposition of the alloy from an acetate electrolyte solution, and nickel-silicide formation at the interface between the silicon and the nickel enhances stability and reduces the contact resistance. It was, therefore, found that nickel-silicide was suitable for high-efficiency solar cell applications. The Ni contact was formed on the front grid pattern by electroless plating followed by anneal ing at $380{\sim}400^{\circ}C$ for $15{\sim}30$ min at $N_{2}$ gas to allow formation of a nickel-silicide in a tube furnace or a rapid thermal processing(RTP) chamber because nickel is transformed to NiSi at $380{\sim}400^{\circ}C$. The Ni plating solution is composed of a mixture of $NiCl_{2}$ as a main nickel source. Cu was electroplated on the Ni layer by using a light induced plating method. The Cu electroplating solution was made up of a commercially available acid sulfate bath and additives to reduce the stress of the copper layer. The Ni/Cu contact was found to be well suited for high-efficiency solar cells and was successfully formed by using electroless plating and electroplating, which are more cost effective than vacuum evaporation. In this paper, we investigated low-cost Ni/Cu contact formation by electroless and electroplating for crystalline silicon solar cells.

• Journal of Sensor Science and Technology
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• v.13 no.2
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• pp.85-89
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• 2004

This paper represents the development of high sensitivity photo-sensor for the fluorescence detection in the integrated biological analysis system. The finger-type PIN photodiodes were fabricated as the photo-sensor, and had a high sensitivity ($I_{light}/I_{dark}$ = 8720). The interference filter consisted of $TiO_{2}$ and $SiO_{2}$ was directly deposited on the photodiodes. Deposited filter with 95.5% reflection under 532 nm and 98% transmission over 580 nm exceedingly decreased the magnitude of background signal in the detection. The PDMS micro-fluidic channels are bonded on the photodiode by $O_{2}$ plasma treatment. The detection current was proportional to two primary parameters (light intensity, concentration), and the on-chip detection system could detect fluorescence signals down to 100 nM concentration (LOD = Limit of detection of rhodamine).

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.20 no.4
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• pp.342-347
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• 2007

$Bi_6Mg_2Nb_4O_{21}(BMN)$ thin films were deposited at various substrates by sputtering system for embedded capacitor applications. BMN thin films deposited at room temperature are manufactured as MIM(Metal/Insulator/Metal) structures. Dielectric properties and leakage current density were investigated as a function of various substrates and thickness of BMN thin films. Leakage current density of BMN thin films deposited on CCL(Copper Clad Laminates) showed relatively high value ($1{\times}10^{-3}A/cm^2$) at an applied field of 300 kV/cm on substrates, possibly due to relatively high value of roughness(rms $50{\AA}$) of CCL substrates. 100 nm-thick BMN thin films deposited on Cu/Ti/Si substrates showed the capacitance density of $300 nF/cm^2$, a dielectric constant of 32, a dielectric loss of 2 % at 100 kHz and the leakage current density of $1{\times}10^{-6}A/cm^2$ at an applied field of 300 kV/cm. BMN capacitors are expected to be promising candidates as embedded capacitors for printed circuit board(PCB).