• Title/Summary/Keyword: $SiO_2$ Dielectric Layer

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Study on the Optimization of HSS STI-CMP Process (HSS STI-CMP 공정의 최적화에 관한 연구)

  • Jeong, So-Young;Seo, Yong-Jin;Park, Sung-Woo;Kim, Chul-Bok;Kim, Sang-Yong;Lee, Woo-Sun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.05c
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    • pp.149-153
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    • 2003
  • Chemical mechanical polishing (CMP) technology for global planarization of multi-level inter-connection structure has been widely studied for the next generation devices. CMP process has been paid attention to planarized pre-metal dielectric (PMD), inter-layer dielectric (ILD) interconnections. Expecially, shallow trench isolation (STI) used to CMP process on essential. Recently, the direct STI-CMP process without the conventional complex reverse moat etch process has established by using slurry additive with the high selectivity between $SiO_2$ and $Si_3N_4$ films for the purpose of process simplification and n-situ end point detection(EPD). However, STI-CMP process has various defects such as nitride residue, tom oxide and damage of silicon active region. To solve these problems, in this paper, we studied the planarization characteristics using a high selectivity slurry(HSS). As our experimental results, it was possible to achieve a global planarization and STI-CMP process could be dramatically simplified. Also we estimated the reliability through the repeated tests with the optimized process conditions in order to identify the reproducibility of HSS STI-CMP process.

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Hydrogen Response Characteristics of Tantalum Oxide Layer Formed by Rapid Thermal Oxidation at High Temperatures (고온에서 급속열산화법으로 형성된 탄탈륨산화막의 수소응답특성)

  • Seong-Jeen Kim
    • Journal of IKEEE
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    • v.27 no.1
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    • pp.19-24
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    • 2023
  • Since silicon having a band gap energy of about 1.12 eV are limited to a maximum operating temperature of less than 250 ℃, the sample with MIS structure based on the SiC substrate of wide-band gap energy was manufactured and the hydrogen response characteristics at high temperatures were investigated. The dielectric layer applied here is a tantalum oxide layer that is highly permeable to hydrogen gas and shows stability at high temperatures. It was formed by RTO at a temperature of 900 ℃ with tantalum. The thickness, depth profiles, and leakage current of the tantalum oxide layer were analyzed through TEM, SIMS, and leakage current characteristics. For the hydrogen gas response characteristics, the capacitance change characteristics were investigated in the temperature range from room temperature to 400 ℃ for hydrogen gas concentrations from 0 to 2,000 ppm. As a result, it was confirmed that the sample exhibited excellent sensitivity and a response time of about 60 seconds.

Development and Application of Group IV Transition Metal Oxide Precursors

  • Kim, Da Hye;Park, Bo Keun;Jeone, Dong Ju;Kim, Chang Gyoun;Son, Seung Uk;Chung, Taek-Mo
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.303.2-303.2
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    • 2014
  • The oxides of group IV transition metals such as titanium, zirconium, hafnium have many important current and future application, including protective coatings, sensors and dielectric layers in thin film electroluminescent (TFEL) devices. Recently, group IV transition metal oxide films have been intensively investigated as replacements for SiO2. Due to high permittivities (k~14-25) compared with SiO2 (k~3.9), large band-gaps, large band offsets and high thermodynamic stability on silicon. Herein, we report the synthesis of new group IV transition metal complexes as useful precursors to deposit their oxide thin films using chemical vapor deposition technique. The complexes were characterized by FT-IR, 1H NMR, 13C NMR and thermogravimetric analysis (TGA). Newly synthesised compounds show high volatility and thermal stability, so we are trying to deposit metal oxide thin films using the complexes by Atomic Layer Deposition (ALD).

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Electrical Properties of BaTiO3-based 0603/0.1µF/0.3mm Ceramics Decoupling Capacitor for Embedding in the PCB of 10G RF Transceiver Module

  • Park, Hwa-sun;Na, Youngil;Choi, Ho Joon;Suh, Su-jeong;Baek, Dong-Hyun;Yoon, Jung-Rag
    • Journal of Electrical Engineering and Technology
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    • v.13 no.4
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    • pp.1638-1643
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    • 2018
  • Multi-layer ceramic capacitors as decoupling capacitor were fabricated by dielectric composition with a high dielectric constant. The fabricated decoupling capacitors were embedded in the PCB of the 10G RF transceiver module and evaluated for the characteristics of electrical noise by the level of AC input voltage. In order to further improve the electrical properties of the $BaTiO_3$ based composite, glass frit, MgO, $Y_2O_3$, $Mn_3O$, $V_2O_5$, $BaCO_3$, $SiO_2$, and $Al_2O_3$ were used as additives. The electrical properties of the composites were determined by various amounts of additives and optimum sintering temperature. As a result of the optimized composite, it was possible to obtain a density of $5.77g/cm^3$, a dielectric constant of 1994, and an insulation resistance of $2.91{\times}10^{12}{\Omega}$ at an additive content of 5wt% and a sintering temperature of $1250^{\circ}C$. After forming a $2.5{\mu}m$ green sheet using the doctor blade method, a total of 77 layers were laminated and sintered at $1180^{\circ}C$. A decoupling capacitor with a size of $0.6mm(W){\times}0.3mm(L){\times}0.3mm(T)$ (width, length and thickness, respectively) and a capacitance of 100 nF was embedded using a PCB process for the 10G RF Transceiver modules. In the range of AC input voltage 400mmV @ 500kHz to 2200mV @ 900kHz, the embedded 10G RF Transceiver modules evaluated that it has better electrical performance than the non-embedded modules.

Effect of ceramic powder addition on the insulating properties of polymer layer prepared by dip coating method

  • Kim, S.Y.;Lee, J.B.;Kwon, B.G.;Hong, G.W.
    • Progress in Superconductivity and Cryogenics
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    • v.16 no.1
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    • pp.14-18
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    • 2014
  • The mechanical, electrical and thermal characteristics of insulating materials may significantly affect the performance and reliability of electrical devices using superconductors. General method to provide insulating layer between coated conductors is wrapping coated conductor with Kapton tape. But uniform and compact wrapping without failure or delamination in whole coverage for long length conductor is not a simple task and need careful control. Coating of insulating layer directly on coated conductor is desirable for providing compact insulating layer rather than wrapping insulating layers around conductor. Ceramic added polymer has been widely used as an insulating material for electric machine because of its good electrical insulating properties as well as excellent heat resistance and fairy good mechanical properties. The insulating layer of coated conductor should have high breakdown voltage and possesses suitable mechanical strength and maintain adhesiveness at the cryogenic temperature where it is used and withstand stress from thermal cycling. The insulating and mechanical properties of polymer can be improved by adding functional filler. In this study, insulating layer has been made by adding ceramic particles such as $SiO_2$ to a polymer resin. The size, amount and morphology of added ceramic powder was controlled and their effect on dielectric property of the final composite was measured and discussed for optimum composite fabrication.

Characterization of Structure and Electrical Properties of $TiO_2$Thin Films Deposited by MOCVD (화학기상증착법에 의한$TiO_2$박막의 구조 및 전기적 특성에 관한 연구)

  • Choe, Sang-Jun;Lee, Yong-Ui;Jo, Hae-Seok;Kim, Hyeong-Jun
    • Korean Journal of Materials Research
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    • v.5 no.1
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    • pp.3-11
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    • 1995
  • $(TiO_{2})$ thin films were deposited on p-Si(100) substrate by APMOCVD using titanium isopropoxide as a source material. The deposition mechanism was well explained by the simple boundary layer theory and the apparent activation energy of the chemical reaction controlled process was 18.2kcal /mol. The asdeposited films were polycrystalline anatase phase and were transformed into rutile phase after postannealing. The postannealing time and the film thikness as well as the postannealing temperature also affected the phase transition. The C-V plot exhibited typical charateristics of MOS diode, from which the dielectric constant of about 80 was obtained. The capacitance of the annealed film was decreased but those of the Nb or Sr doped films were not changed. I-V characteristics revealed that the conduction mechanism was hopping conduction. The postannealing and the doping of Nb or Sr cause to decrease the leakage current and to increase the breakdown voltage.

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Inorganic ferroelectric materials for LC alignment for high performance display design

  • Lee, Won-Gyu;Choe, Ji-Hyeok;Na, Hyeon-Jae;Im, Ji-Hun;Han, Jeong-Min;Hwang, Jeong-Yeon;Seo, Dae-Sik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2009.11a
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    • pp.161-161
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    • 2009
  • Ion bombarded inorganic materials for LC alignment has been researched as it provides controllability in a nonstop process for producing high-resolution displays. Many optically transparent insulators such as $SiOx$ and a-C:H have been investigated as potential candidates for inorganic alignment materials. Even so, LC orientation on a new material with superior capacity is required to produce high-performance displays. Many inorganic materials with high permittivities can reduce the voltage losses due to the LC alignment layer that are a trade-off for its capacitance. The minimum voltage for device operation can be applied to the LC under low external voltage using these materials. This means that low power consumption for LCD applications can be achieved using a high-k alignment structure in which the LC can be driven effectively with a low threshold voltage. Among the many other potential high-k oxides, HfO2 is considered to be one of the most promising due to its remarkable properties of high dielectric constant, relatively low leakage current, large band gap (5.68 eV), and high transparency. Due to these characteristics, HfO2 can be used in LC alignment to increase the capacitance of the inorganic alignment layer for low-voltage driving of LCs.

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Improving the Light Extraction Efficiency of GRIN Coatings Pillar Light Emitting Diodes

  • Moe, War War;Aye, Mg;Hla, Tin Tin
    • Korean Journal of Materials Research
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    • v.32 no.6
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    • pp.293-300
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    • 2022
  • This study investigated a graded-refractive-index (GRIN) coating pattern capable of improving the light extraction efficiency of GaN light-emitting diodes (LEDs). The planar LEDs had total internal reflection thanks to the large difference in refractive index between the LED semiconductor and the surrounding medium (air). The main goal of this paper was to reduce the trapped light inside the LED by controlling the refractive index using various compositions of (TiO2)x(SiO2)1-x in GRIN LEDs consisting of five dielectric layers. Several types of multilayer LEDs were simulated and it was determined the transmittance value of the LEDs with many layers was greater than the LEDs with less layers. Then, the specific ranges of incident angles of the individual layers which depend on the refractive index were evaluated. According to theoretical calculations, the light extraction efficiency (LEE) of the five-layer GRIN is 25.29 %, 28.54 % and 30.22 %, respectively. Consequently, the five-layer GRIN LEDs patterned enhancement outcome LEE over the reference planar LEDs. The results suggest the increased light extraction efficiency is related to the loss of Fresnel transmission and the release of the light mode trapped inside the LED chip by the graded-refractive-index.

CHARACTERISTICS OF HETEROEPITAXIALLY GROWN $Y_2$O$_3$ FILMS BY r-ICB FOR VLSI

  • Choi, S.C.;Cho, M.H.;Whangbo, S.W.;Kim, M.S.;Whang, C.N.;Kang, S.B.;Lee, S.I.;Lee, M.Y.
    • Journal of the Korean institute of surface engineering
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    • v.29 no.6
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    • pp.809-815
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    • 1996
  • $Y_2O_3$-based metal-insulator-semiconductor (MIS) structure on p-Si(100) has been studied. Films were prepared by UHV reactive ionized cluster beam deposition (r-ICBD) system. The base pressure of the system was about $1 \times 10^{-9}$ -9/ Torr and the process pressure $2 \times 10^{-5}$ Torr in oxygen ambience. Glancing X-ray diffraction(GXRD) and in-situ reflection high energy electron diffracton(RHEED) analyses were performed to investigate the crystallinity of the films. The results show phase change from amorphous state to crystalline one with increasingqr acceleration voltage and substrate temperature. It is also found that the phase transformation from $Y_2O_3$(111)//Si(100) to $Y_2O_3$(110)//Si(100) in growing directions takes place between $500^{\circ}C$ and $700^{\circ}C$. Especially as acceleration voltage is increased, preferentially oriented crystallinity was increased. Finally under the condition of above substrate temperature $700^{\circ}C$ and acceleration voltage 5kV, the $Y_2O_3$films are found to be grown epitaxially in direction of $Y_2O_3$(1l0)//Si(100) by observation of transmission electron microscope(TEM). Capacitance-voltage and current-voltage measurements were conducted to characterize Al/$Y_2O_3$/Si MIS structure with varying acceleration voltage and substrate temperature. Deposited $Y_2O_3$ films of thickness of nearly 300$\AA$ show that the breakdown field increases to 7~8MV /cm at the same conditon of epitaxial growing. These results also coincide with XPS spectra which indicate better stoichiometric characteristic in the condition of better crystalline one. After oxidation the breakdown field increases to 13MV /cm because the MIS structure contains interface silicon oxide of about 30$\AA$. In this case the dielectric constant of only $Y_2O_3$ layer is found to be $\in$15.6. These results have demonstrated the potential of using yttrium oxide for future VLSI/ULSI gate insulator applications.

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Investigation charge trapping properties of an amorphous In-Ga-Zn-O thin-film transistor with high-k dielectrics using atomic layer deposition

  • Kim, Seung-Tae;Jo, Won-Ju
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.264-264
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    • 2016
  • 최근에 charge trap flash (CTF) 기술은 절연막에 전하를 트랩과 디트랩 시킬 때 인접한 셀 간의 간섭현상을 최소화하여 오동작을 줄일 수 있으며 낸드 플래시 메모리 소자에 적용되고 있다. 낸드 플래시 메모리는 고집적화, 대용량화와 비휘발성 등의 장점으로 인해 핸드폰, USB, MP3와 컴퓨터 등에 이용되고 있다. 기존의 실리콘 기반의 플래시 메모리 소자는 좁은 밴드갭으로 인해 투명하지 않고 고온에서의 공정이 요구되는 문제점이 있다. 따라서, 이러한 문제점을 개선하기 위해 실리콘의 대체 물질로 산화물 반도체 기반의 플래시 메모리 소자들이 연구되고 있다. 산화물 반도체 기반의 플래시 메모리 소자는 넓은 밴드갭으로 인한 투명성을 가지고 있으며 저온에서 공정이 가능하여 투명하고 유연한 기판에 적용이 가능하다. 다양한 산화물 반도체 중에서 비정질 In-Ga-Zn-O (a-IGZO)는 비정질임에도 불구하고 우수한 전기적인 특성과 화학적 안정성을 갖기 때문에 많은 관심을 받고 있다. 플래시 메모리의 고집적화가 요구되면서 절연막에 high-k 물질을 atomic layer deposition (ALD) 방법으로 적용하고 있다. ALD 방법을 이용하면 우수한 계면 흡착력과 균일도를 가지는 박막을 정확한 두께로 형성할 수 있는 장점이 있다. 또한, high-k 물질을 절연막에 적용하면 높은 유전율로 인해 equivalent oxide thickness (EOT)를 줄일 수 있다. 특히, HfOx와 AlOx가 각각 trap layer와 blocking layer로 적용되면 program/erase 동작 속도를 증가시킬 수 있으며 넓은 밴드갭으로 인해 전하손실을 크게 줄일 수 있다. 따라서 본 연구에서는 ALD 방법으로 AlOx와 HfOx를 게이트 절연막으로 적용한 a-IGZO 기반의 thin-film transistor (TFT) 플래시 메모리 소자를 제작하여 메모리 특성을 평가하였다. 제작 방법으로는, p-Si 기판 위에 열성장을 통한 100 nm 두께의 SiO2를 형성한 뒤, 채널 형성을 위해 RF sputter를 이용하여 70 nm 두께의 a-IGZO를 증착하였다. 이후에 소스와 드레인 전극에는 150 nm 두께의 In-Sn-O (ITO)를 RF sputter를 이용하여 증착하였고, ALD 방법을 이용하여 tunnel layer에 AlOx 5 nm, trap layer에 HfOx 20 nm, blocking layer에 AlOx 30 nm를 증착하였다. 최종적으로, 상부 게이트 전극을 형성하기 위해 electron beam evaporator를 이용하여 platinum (Pt) 150 nm를 증착하였고, 계면 결함을 최소화하기 위해 퍼니스에서 질소 가스 분위기, $400^{\circ}C$, 30 분의 조건으로 열처리를 했다. 측정 결과, 103 번의 program/erase를 반복한 endurance와 104 초 동안의 retention 측정으로부터 큰 열화 없이 메모리 특성이 유지되는 것을 확인하였다. 결과적으로, high-k 물질과 산화물 반도체는 고성능과 고집적화가 요구되는 향후 플래시 메모리의 핵심적인 물질이 될 것으로 기대된다.

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