Browse > Article

HW Matrix Multiplier Implementation & Performance Measurement for Low Earth Orbit Satellite  

Lee, Yunki (한국항공우주연구원 위성전자팀)
Kim, Jihoon (충남대학교 전자공학과)
Publication Information
Journal of Satellite, Information and Communications / v.10, no.2, 2015 , pp. 115-120 More about this Journal
Abstract
Until now, AOCS SW has used FPU which is one of CPU resources for satellite attitude control. And most of the SW Throughput was consumed to calculate Matrix Multiply. As SW throughput margin is decreasing seriously with shorter control period and more computational burden at next satellite programs, a dedicated HW matrix multiplier is absolutely required. This paper represents results of HW implementation & performance measurement and mentions several techniques for performance improvement, further works.
Keywords
Flight Software; Floating Point Unit; Hardware; Matrix; Multiplier;
Citations & Related Records
연도 인용수 순위
  • Reference
1 "LEO ACS FSW Throughput Reexamination", 2008.10.12, KARI IOC
2 이윤기, 김지훈, "Double-Precision기반의 HW Matrix곱셈기 구현에 관한 타당성 연구", 춘계 항공우주 학술대회, 2014, pp. 837-840.
3 Ju-Wook Jang, Seonil B. Choi and Viktor K. Prasanna. "Energy- and Time-Efficient Matrix Multiplication on FPGAs'' IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 13, no. 11, pp. 1305-1319, 2005.   DOI
4 Shivangi Tiwari and Nitin Meena "Efficient Hardware Design for Implementation of Matrix Multiplication by using PPI-SO'' International Journal of Innovative Research in Computer and Communication Engineering, vol. 1, Issue 4, pp. 1020-1024, 2013.
5 Nirav Dave, Kermin Fleming, Myron King, Michael Pellauer, Muralidaran Vijayaraghavan. "Hardware Acceleration of Matrix Multiplication on a Xilinx FPGA'' MEMOCODE 2007. 5th IEEE/ACM International Conference. pp. 97-100
6 David Bishop,"Floating Point Package User's Guide", http://www.vhdl.org/fphdl/vhdl.html,
7 "IEEE-754 Standard", 1985, IEEE