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http://dx.doi.org/10.9723/jksiis.2013.18.5.067

A Design of Low-Power Bypassing Booth Multiplier  

Ahn, Jong Hun (충남대학교 컴퓨터공학과)
Choi, Seong Rim (충남대학교 컴퓨터공학과)
Nam, Byeong Gyu (충남대학교 컴퓨터공학과)
Publication Information
Journal of Korea Society of Industrial Information Systems / v.18, no.5, 2013 , pp. 67-72 More about this Journal
Abstract
A low-power bypassing Booth multiplier for mobile multimedia applications is proposed. The bypassing structure directly transfers input values to outputs without switching the internal nodes of a multiplier, enabling low-power design. The proposed Booth multiplier adopts the bypassing structure while the bypassing is usually adopted in the Braun multipliers. Simulation results show the proposed Booth multiplier achieves an 11% reduction in terms of the proposed FoM compared to prior works.
Keywords
Booth Multiplier; Bypassing Structure; Mobile Multimedia Applications;
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