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http://dx.doi.org/10.9723/jksiis.2012.17.4.017

Design of Ultra Low-Voltage NCL Circuits in Nanoscale MOSFET Technology  

Hong, Woo-Hun (대구대학교 전자공학과)
Kim, Kyung-Ki (대구대학교 전자전기공학부)
Publication Information
Journal of Korea Society of Industrial Information Systems / v.17, no.4, 2012 , pp. 17-23 More about this Journal
Abstract
Ultra low-power design and energy harvesting applications require digital systems to operate under extremely low voltages approaching the point of balance between dynamic and static power consumption which is attained in the sub-threshold operation mode. Delay variations are extremely large in this mode. Therefore, in this paper, a new low-power logic design methodology using asynchronous NCL circuits is proposed to reduce power consumption and not to be affected by various technology variations in nanoscale MOSFET technology. The proposed NCL is evaluated using various benchmark circuits at 0.4V supply voltage, which are designed using 45nm MOSFET predictive technology model. The simulation results are compared to those of conventional synchrouns logic circuits in terms of power consumption and speed.
Keywords
Asynchronous circuit; NCL; Null conventijon logic; Nanoscale MOSFET;
Citations & Related Records
Times Cited By KSCI : 2  (Citation Analysis)
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