Browse > Article

SHA-1 Pipeline Configuration According to the Maximum Critical Path Delay  

Lee, Je-Hoon (Div. of Electronics, Information and Communication Eng., Kangwon National University)
Choi, Gyu-Man (Dept. of Electrical Engineering, Catholic GwanDong University)
Publication Information
Convergence Security Journal / v.16, no.7, 2016 , pp. 113-120 More about this Journal
Abstract
This paper presents a new high-speed SHA-1 pipeline architecture having a computation delay close to the maximum critical path delay of the original SHA-1. The typical SHA-1 pipelines are based on either a hash operation or unfolded hash operations. Their throughputs are greatly enhanced by the parallel processing in the pipeline, but the maximum critical path delay will be increased in comparison with the unfolding of all hash operations in each round. The pipeline stage logics in the proposed SHA-1 has the latency is similar with the result of dividing the maximum threshold delay of a round by the number of iterations. Experimental results show that the proposed SHA-1 pipeline structure is 0.99 and 1.62 at the operating speed ratio according to circuit size, which is superior to the conventional structure. The proposed pipeline architecture is expected to be applicable to various cryptographic and signal processing circuits with iterative operations.
Keywords
Hash algorithm; SHA-1; pipeline; non-linear pipeline; iteration;
Citations & Related Records
연도 인용수 순위
  • Reference
1 N. Sklavos, E. Alexopoulos and O. Koufopavlou, "An ultra high speed architecture for VLSI implementation of Hash functions," Proc. of ICECS 2003, pp. 990-993, 2003.
2 L. Jiang, Y. Wang, Q. Zhao, Y. Shao and X. Zhao, "Ultra high throughput architectures for SHA-1 Hash algorithm on FPGA," Proc. of CiSE 2009, pp. 1-4, 2009.
3 N. Sklavos, E. Alexopoulos and O. Koufopavlou, "Networking data integrity: High speed architecture and hardware implementation," The Int'l Arab J. of Information Technology, vol. 1, no, 6, pp. 54-59, July 2003.
4 H. Michail, A. Kakarountas, O. Koufopavlou and C. Goutis, "A low-power and high-throughput implementation of the SHA-1 Hash function," Proc. of ISCAS 2005, pp. 23-26, 2005.
5 Y. Lee, H. Chan and I. Verbauwhede, "Throughput optimized SHA-1 architecture using unfolding transformation, Proc. of ASAP 2006, pp. 354-359, 2006.
6 S. Suhaili and T. Watanabe, "High throughput evaluation of SHA-1 implementation using unfolding transformation," ARPN J. of Engineering and Applied Sciences, vol. 11, no. 5, pp. 3350-3355, March 2016.
7 H. Michail, G. Arthanasiou, G. Theodoridis, A. Gregoriades and C. Goutis, "Design and Implementation of totally-self checking SHA-1 and SHA-256 hash functions's architecture," Microprocessors and Microsystems, vol. 45, part B, pp. 227-240, Sep. 2016.   DOI
8 E. Lee, J. Lee, I. Park and K. Cho, "Implementation of high-speed SHA-1 architecture," IEICE ELEX, vol. 6, pp. 1174-1179, Aug. 2009.   DOI