Browse > Article

Design of an HIGHT Processor Employing LFSR Architecture Allowing Parallel Outputs  

Lee, Je-Hoon (강원대학교 전자정보통신공학부)
Kim, Sang-Choon (강원대학교 전자정보통신공학부)
Publication Information
Convergence Security Journal / v.15, no.2, 2015 , pp. 81-89 More about this Journal
Abstract
HIGHT is an 64-bit block cipher, which is suitable for low power and ultra-light implementation that are used in the network that needs the consideration of security aspects. This paper presents a key scheduler that employs the presented LFSR and reverse LFSR that can generate four outputs simultaneously. In addition, we construct new key scheduler that generates 4 subkey bytes at a clock since each round block requires 4 subkey bytes at a time. Thus, the entire HIGHT processor can be controlled by single system clock with regular control mechanism. We synthesize the HIGHT processor using the VHDL. From the synthesis results, the logic size of the presented key scheduler can be reduced as 9% compared to the counterpart that is employed in the conventional HIGHT processor.
Keywords
Block cipher; Hight; key schedule; LFSR; parallel processing;
Citations & Related Records
연도 인용수 순위
  • Reference
1 L. Huai, X. Zou, Z. Liu, and Y. Han, "An Energy-Efficient AES-CCM Implementation for IEEE802.15.4 Wireless Sensor Networks", 2009 International Conf. on Networks Security, Wireless Communications and Trusted Computing, pp. 394-397, 2009
2 F. Bin, Q. De-yu, and H. Han, "Parallel and multiplex architecture of AES-CCM coprocessor Implementation for IEEE802.15.4 Wireless Sensor Networks", 2013 Fourth International Conf. on Emerging Intelligent Data and Web Technologies, pp. 149-153, 2013
3 서화정, 김호원, "센서네트워크에 적용 가능한 HIGHT 알고리즘의 최적화 구현 기법," 한국해양정보통신학회논문지, 제15권, 제7호, pp. 1510-1516, 2011년 7월.
4 M. Feldhofer, J. Wolkerstorfer, and V. Rijmen, "AES implementation on grain of sand", IEE Proc. Information Security, Vol. 152, No. 1, pp. 13-20, 2005.   DOI
5 A. Satoh, S. Morioka, K. Takno, and S. Munetoh, "A compact rijndael hardware architecture with S-Box optimization", Proc. ASIACRYTP2001 LNCS 2248, pp. 239-254, 2001.
6 D. Hong et al., "HIGHT: A new block cipher suitable for low-resource device", Proc. CHES2006 LNCS 4249, pp. 46-59, 2001.
7 Y. I. Lim, J. H. Lee, Y. You, and K. R. Cho, "Implementation of HIGHT cryptic circuit for RFID tag", IEICE Electronic Express, Vol.6, No.4, pp. 180-186, 2009.   DOI